LM3S8971 Datasheet, PDF (525/577 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8971 Microcontroller
Pin Number
95
96
97
Pin Name
ADC7
ADC6
GNDA
98
VDDA
99
ADC5
100
ADC4
Pin Type
I
I
-
-
I
I
Buffer Type Description
Analog Analog-to-digital converter input 7.
Analog Analog-to-digital converter input 6.
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Power
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
Analog Analog-to-digital converter input 5.
Analog Analog-to-digital converter input 4.
Table 21-2. Signals by Signal Name
Pin Name
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
C0+
C0-
C0o
CAN0Rx
CAN0Tx
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
CMOD0
Pin Number
1
2
5
6
100
99
96
95
90
92
24
10
11
66
34
67
23
35
91
65
Pin Type
I
I
I
I
I
I
I
I
I
I
O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CMOD1
76
I/O
Fault
GND
GND
GND
GND
71
I
9
-
15
-
21
-
33
-
Buffer Type Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog-to-digital converter input 2.
Analog Analog-to-digital converter input 3.
Analog Analog-to-digital converter input 4.
Analog Analog-to-digital converter input 5.
Analog Analog-to-digital converter input 6.
Analog Analog-to-digital converter input 7.
Analog Analog comparator 0 positive input
Analog Analog comparator 0 negative input
TTL
Analog comparator 0 output
TTL
CAN module 0 receive
TTL
CAN module 0 transmit
TTL
Capture/Compare/PWM 0
TTL
Capture/Compare/PWM 1
TTL
Capture/Compare/PWM 2
TTL
Capture/Compare/PWM 3
TTL
Capture/Compare/PWM 1
TTL
Capture/Compare/PWM 5
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
PWM Fault
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
October 01, 2007
525
Preliminary