LM3S8971 Datasheet, PDF (458/577 Pages) List of Unclassifed Manufacturers – Microcontroller

Analog Comparator
17.3
Figure 17-3. Comparator Internal Reference Structure
AVDD
8R R
R
8R
R
R
•••
EN
VREF
RNG
15 14
•••
1
0
Decoder
internal
reference
Table 17-2. Internal Reference Voltage and ACREFCTL Field Values
ACREFCTL Register
Output Reference Voltage Based on VREF Field Value
EN Bit Value RNG Bit Value
EN=0
RNG=X
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and VREF=0
for the least noisy ground reference.
EN=1
RNG=0 Total resistance in ladder is 32 R.
R
V
REF
=
AV
DD
×
-----^V----^R----^E---^F
R
T
V
REF
=
AV
DD
×
(_{---V-----R----E----F------}+_----8----)
32
RNG=1
V = 0.825 + 0.103 VR EF
R EF
The range of internal reference in this mode is 0.825-2.37 V.
Total resistance in ladder is 24 R.
R
V
REF
=
AV
DD
×
-----^V----^R----^E---^F
R
T
V
REF
=
AV
DD
×
(_{---V-----R----E----F----})
24
V_REF = 0.1375 x V_REF
The range of internal reference for this mode is 0.0-2.0625 V.
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator 0 clock by writing a value of 0x0010.0000 to the RCGC1 register
in the System Control module.
2. In the GPIO module, enable the GPIO port/pin associated with C0- as a GPIO input.
458
October 01, 2007
Preliminary