ISD-T360SB Datasheet, PDF(45/109 Page) List of Unclassifed Manufacturers – VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support

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ISD-T360SB Datasheet, PDF (45/109 Pages) List of Unclassifed Manufacturers – VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support

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2âSOFTWARE

ISD-T360SB

2.1.7 POWER-DOWN MODE

The PDM (Go To Power-Down Mode) command

switches the ISD-T360SB to power-down mode.

The purpose of the PDM command is to save

power during buttery operation, or for any other

power saving cause. During power-down mode

only basic functions, such as ARAM/DRAM re-

fresh and time and date update, are active (for

more details refer to POWER-DOWN MODE de-

scription on page 1-4).

This PDM command may only be issued when

the processor is in the IDLE mode (for an expla-

nation of the ISD-T360SB states, see âCommand

Executionâ on page 2â2). If it is necessary to

switch to power-down mode from any other

state, the controller must first issue a S (Stop)

command to switch the processor to the IDLE

state, and then issue the PDM command. Send-

ing any command while in power-down mode

resets the VoiceDSP processor detectors, and re-

turns it to normal operation mode.

NOTE

Entering or exiting power-down mode can

distort the real-time clock by up to 500 Âµs.

Thus, to maintain the accuracy of the real-

time clock, enter or exit the power-down

mode as infrequently as possible.

2.2 PERIPHERALS

This section provides details of the peripherals in-

terface support functions and their principle op-

eration. It is divided into the following subjects:

â¢ Microcontroller Interface (Slave

MICROWIRE)

â¢ Memory Interface

â¢ Codec Interface

2.2.1 MICROCONTROLLER INTERFACE

MICROWIRE/PLUSâ¢ is a synchronous serial com-

munication protocol minimizes the number of

connections, and thus the cost, of communicat-

ing with peripherals.

The VoiceDSP MICROWIRE interface implements

the MICROWIRE/PLUS interface in slave mode,

with an additional ready signal. It enables a mi-

crocontroller to interface efficiently with the

VoiceDSP processor application.

The microcontroller is the protocol master and

provides the clock for the protocol. The VoiceD-

SP processor supports clock rates of up to 400

KHz. This transfer rate refers to the bit transfer; the

actual throughput is slower due to byte process-

ing by the VoiceDSP processor and the micro-

controller.

Communication is handled in bursts of eight bits

(one byte). In each burst the VoiceDSP proces-

sor is able to receive and transmit eight bits of

data. After eight bits have been transferred, an

internal interrupt is issued for the VoiceDSP pro-

cessor to process the byte, or to prepare another

byte for sending. In parallel, the VoiceDSP pro-

cessor sets MWRDY to 1, to signal the microcon-

troller that it is busy with the byte processing.

Another byte can be transferred only when the

MWRDY signal is cleared to 0 by the VoiceDSP

processor. When the VoiceDSP processor trans-

mits data, it expects to receive the value 0xAA

before each transmitted byte. The VoiceDSP

processor reports any status change by clearing

the MWRQST signal to 0.

If processor commandâs parameter is larger than

one byte, the microcontroller transmits the Most

Significant Byte (MSB) first. If a return value is larg-

er than one byte, the VoiceDSP processor trans-

mits the MSB first.

The following signals are used for the interface

protocol. Input and output are relative to the

VoiceDSP processor.

ISD

2-5

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