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ISD-T360SB Datasheet, PDF (12/109 Pages) List of Unclassifed Manufacturers – VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support
ISD-T360SB
1—HARDWARE
Figure 1-3: External Clock Source
VoiceDSP
X1 X2/CLKIN
Single-phase Clock Signal
Clock Generator
Table 1-2 lists the components in the crystal oscil-
lator circuit
Table 1-2: Components of Crystal Oscillator
Circuit
Component
Values
Tolerance
Crystal Resonator 4.096 MHz
Resistor R1
10 MΩ
5%
Capacitors C1, 33 pF
20%
C2
Crystal Oscillator
A crystal oscillator is connected to the on-chip
oscillator circuit via the X1 and X2 signals, as
shown in Figure 1-4.
Figure 1-4: Connections for an External
Crystal Oscillator
ISD-T360
X2
X1
R1
C2
C1
Keep stray capacitance and inductance, in the
oscillator circuit, as low as possible. The crystal
resonator, and the external components, should
be as close to the X1 and X2/CLKIN pins as possi-
ble, to keep the trace lengths in the printed cir-
cuit to an absolute minimum.
You can use crystal oscillators with maximum
load capacitance of 20 pF, although the oscilla-
tion frequency may differ from the crystal’s spec-
ified value.
1.2.3 POWER-DOWN MODE
Power-down mode is useful during a power fail-
ure or in a power-saving model, when the power
source for the processor is a backup battery or in
battery-powered devices, while the processor is
in idle mode.
In power-down mode, the clock frequency of
the VoiceDSP processor is reduced and some of
the processor modules are deactivated. As a re-
sult, the ISD-T360SB consumes considerably less
power than in normal-power mode. Although
the VoiceDSP processor does not perform all its
usual functions in power-down mode, it does re-
tain stored messages and maintain the date and
time.
NOTE
In power-down mode all the chip select
signals, CS0 to CS3, are set to 1. To guaran-
tee that there is no current flow from these
signals to the Flash devices, the power sup-
ply to these devices must not be
disconnected.
The ISD-T360SB stores messages and all memory
management information in Flash or ARAM/
DRAM memory. When Flash memory is used for
memory management, power does not need to
be maintained to the processor to preserve
stored messages. When ARAM/DRAM memory is
used for message management, preserving
stored messages requires a battery back up dur-
1-4
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