ISD-T360SB Datasheet, PDF (19/109 Pages) List of Unclassifed Manufacturers – VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support

1—HARDWARE
ISD-T360SB
The number of recorded messages. (The basic
memory allocation unit for a message is a 4-
Kbyte block, which means that half a block on
average is wasted per recorded message).
Table 1-5: Recording Time with 15% Silence
Compression
Memory Size
Compression Total Recording
Rate
Time
4 Mbit
4 Mbit
4 Mbit
8 Mbit
8 Mbit
8 Mbit
16 Mbit
16 Mbit
16 Mbit
32 Mbit
32 Mbit
32 Mbit
5.3 Kbit/s
9.9 Kbit/s
16.8 Kbit/s
5.3 Kbit/s
9.9 Kbit/s
16.8 Kbit/s
5.3 Kbit/s
9.9 Kbit/s
16.8 Kbit/s
5.3 Kbit/s
9.9 Kbit/s
16.8 Kbit/s
14.9 Minutes
8.1 Minutes
4.8 Minutes
29.8 Minutes
16.2 Minutes
9.6 Minutes
59.6 Minutes
32.4 Minutes
19.2 Minutes
119.2 Minutes
64.8 Minutes
38.4 Minutes
ARAM/DRAM Support
The VoiceDSP processor supports up to four,
16-Mbit, ARAM/DRAM devices for storing mes-
sages. The ISD-T360 connects to the ARAM/
DRAM device using address buses A0–A11 and
data buses D0–D3. This connection allows ac-
cess to 2²² nibbles (16-Mbit) on each device. The
ISD-T360SB selects the current ARAM/DRAM de-
vice using PB3–PB6 as described in Figure 1-10.
Using less than four ARAM/DRAM devices re-
quires connecting the devices sequentially,
starting from PB3 up to PC6. RAS and CAS are
connected in parallel to all the ARAM/DRAM de-
vices and are used to refresh the memory. The
difference between ARAM and DRAM resides
with the amount of bad cells on the device and
the device performance. While DRAM has no
bad cells, ARAM contains certain level of impuri-
ty and thus requires testing and mapping of the
bad blocks upon the initialization of the ISD-
T360SB. Although there are no real blocks on the
ARAM device, the ISD-T360SB emulates virtual
“blocks” on the ARAM device (as if it was a Flash
device), tests these “blocks” and marks them in
a special map on the last “block” on each de-
vice. This test is required only when using ARAM
devices (as opposed to DRAM devices that re-
quire no testing due to lack of bad blocks). The
virtual division to blocks simplifies the use of
ARAM/DRAM devices and allows the use of the
same set of commands for Flash and ARAM/
DRAM.
Another major difference between ARAM/
DRAM and Flash devices is that the internal map-
ping in the ARAM is lost upon power off. Thus, the
initialization process needs to take place after
each power reset. The mapping is not lost when
entering and exiting the Power-Down Mode.
Refer to Figure 1-24 through Figure 1-28 for Timing
Diagrams of ARAM/DRAM Read, Write, Refresh in
Normal Mode and Refresh in Power-Down Mode
Cycles.
ROM Interface
IVS vocabularies can be stored in either Flash
memory and/or ROM. The VoiceDSP processor
supports IVS ROM devices through an Expansion
Memory mechanism. Up to 64 Kbytes (64K x 8) of
Expansion Memory are directly supported. Nev-
ertheless, the processor uses bits of the on-chip
port (PB) to further extend the 64 Kbytes address
space up to 0.5 Mbytes address space.
ROM is connected to the VoiceDSP processor us-
ing the data bus, D(0:7), the address bus,
A(0:15), the extended address signals, EA(16:18),
and Expansion Memory Chip Select, EMCS, con-
trols. The number of extended address pins to
use may vary, depending on the size and config-
uration of the ROM. ISD-T360SB configured with
semi-parallel Flash memory can not support ex-
tension ROM.
ISD
1-11