ISD-T360SB Datasheet, PDF (27/109 Pages) List of Unclassifed Manufacturers – VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support

1—HARDWARE
ISD-T360SB
Table 1-9: Electrical Characteristics—Preliminary Information
(All Parameters with Reference to V_CC = 3.3 V)
Symbol
Parameter
Conditions
t_WRCSh
t_WRh
WR0 Hold after EMCS⁴
WR0 Hold
R.E. EMCS R.E. to R.E. WR0
After R.E. CTTL
t_WRia
WR0 Inactive
After R.E. CTTL, T3
V_ENVh
V_Hh
ENV0 Input, High Voltage
CMOS Input with Hysteresis,
Logical 1 Input Voltage
V_Hl
V_Hys
V_IH
CMOS Input with Hysteresis,
Logical 0 Input Voltage
Hysteresis Loop Width¹
TTL Input, Logical 1 Input
Voltage
V_IL
TTL Input, Logical 0 Input
Voltage
V_OH
Logical 1 TTL, Output
Voltage
I_OH = –0.4 mA
V_OHWC
MMCLK, MMDOUT and
EMCS Logical 1, Output
Voltage
I_OH = –0.4 mA
I_OH = –50 µA⁵
V_OL
V_OLWC
Logical 0, TTL Output
Voltage
MMCLK, MMDOUT and
EMCS Logical 0, Output
Voltage
I_OL = 4 mA
I_OL = 50 µA⁵
I_OL = 4 mA
I_OL = 50 µA⁵
V_XH
CLKIN Input, High Voltage External Clock
V_XL
CLKIN Input, Low Voltage External Clock
Min
10.0
t_CTp/2–6
2.0
2.1
0.5
2.0
–0.5
2.4
2.4
V_CC–0.2
2.0
Typ
Max
t_CTp/2+2
0.8
V_CC+0.5
0.8
0.45
0.2
0.45
0.2
0.8
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1. Guaranteed by design.
2. I_OUT =0, T_A 25˚C, V_CC = 3.3 V for V_CC pins and 3.3 V or 5 V on V_CCHI pins, operating from a 4.096 MHz crystal and
running from internal memory with Expansion Memory disabled.
3. All input signals are tied to 0 (above V_CC – 0.5 V or below V_SS + 0.5 V), except ENV0, which is tied to V_CC.
4. Measured in power-down mode. The total current driven, or sourced, by all the VoiceDSP processor’s output signals
is less than 50 µA.
5. Guaranteed by design, but not fully tested.
ISD
1-19