NT5DS64M4AT Datasheet, PDF (36/78 Pages) List of Unclassifed Manufacturers – 256Mb Double Data Rate SDRAM

NT5DS64M4AT NT5DS64M4AW
NT5DS32M8AT NT5DS32M8AW
256Mb Double Data Rate SDRAM
Write to Read: Non-Interrupting (CAS Latency = 2; Burst Length = 4)
CK
CK
Command
Address
DQS
DQ
DM
Maximum D_QSS
T1
T2
T3
T4
T5
T6
Write
NOP
NOP
BAa, COL b
t_DQSS (max)
DI a-b
NOP
Read
NOP
t_WTR
BAa, COL n
CL = 2
CK
CK
Command
Address
DQS
DQ
DM
Minimum D_QSS
T1
T2
T3
T4
T5
T6
Write
NOP
NOP
BAa, COL b
t_DQSS (min)
DI a-b
NOP
Read
NOP
t_WTR
BAa, COL n
CL = 2
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
t_WTR is referenced from the first positive CK edge after the last data in pair.
A10 is Low with the Write command (Auto Precharge is disabled).
The Read and Write commands may be to any bank.
Don’t Care
REV 1.1
12/2001
36
© NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.