NT5DS64M4AT Datasheet, PDF (15/78 Pages) List of Unclassifed Manufacturers – 256Mb Double Data Rate SDRAM

NT5DS64M4AT NT5DS64M4AW
NT5DS32M8AT NT5DS32M8AW
256Mb Double Data Rate SDRAM
Commands
Truth Tables 1a and 1b provide a reference of the commands supported by DDR SDRAM devices. A verbal description of each
commands follows.
Truth Table 1a: Commands
Name (Function)
Deselect (Nop)
No Operation (Nop)
Active (Select Bank And Activate Row)
Read (Select Bank And Column, And Start Read Burst)
Write (Select Bank And Column, And Start Write Burst)
Burst Terminate
Precharge (Deactivate Row In Bank Or Banks)
Auto Refresh Or Self Refresh (Enter Self Refresh Mode)
Mode Register Set
CS RAS CAS WE
H
X
X
X
L
H
H
H
L
L
H
H
L
H
L
H
L
H
L
L
L
H
H
L
L
L
H
L
L
L
L
H
L
L
L
L
Address
X
X
Bank/Row
Bank/Col
Bank/Col
X
Code
X
Op-Code
MNE
NOP
NOP
ACT
Read
Write
BST
PRE
AR / SR
MRS
Notes
1, 9
1, 9
1, 3
1, 4
1, 4
1, 8
1, 5
1, 6, 7
1, 2
1. CKE is high for all commands shown except Self Refresh.
2. BA0, BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register; BA0 = 1, BA1 = 0 selects
Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the op-code to be written to the selected Mode
Register.)
3. BA0-BA1 provide bank address and A0-A12 provide row address.
4. BA0, BA1 provide bank address; A0-Ai provide column address (where i = 9 for x8 and 9, 11 for x4); A10 high enables the Auto Pre-
charge feature (nonpersistent), A10 low disables the Auto Precharge feature.
5. A10 LOW: BA0, BA1 determine which bank is precharged.
A10 HIGH: all banks are precharged and BA0, BA1 are “Don’t Care.”
6. This command is auto refreshif CKE is high; Self Refresh if CKE is low.
7. Internal refresh counter controls row and bank addressing; all inputs and I/Os are “Don’t Care” except for CKE.
8. Applies only to read bursts with Auto Precharge disabled; this command is undefined (and should not be used) for read bursts with Auto
Precharge enabled or for write bursts
9. Deselect and NOP are functionally interchangeable.
Truth Table 1b: DM Operation
Name (Function)
Write Enable
Write Inhibit
1. Used to mask write data; provided coincident with the corresponding data.
DM
DQs
Notes
L
Valid
1
H
X
1
REV 1.1
12/2001
15
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