DS89C420 Datasheet, PDF (5/59 Pages) Dallas Semiconductor – Ultra-High-Speed Microcontroller

DS89C420
PIN
NAME
DIP
PLCC TQFP
FUNCTION
1–8
2–9
40–44 P1.0–P1.7 _{Port 1, I/O. Port 1 functions as both an 8-bit, bidirectional I/O}
1
port and an alternate functional interface for timer 2 I/O, new
2
external interrupts, and new serial port 1. The reset condition of
3
port 1 is with all bits at a logic 1. In this state, a weak pullup
holds the port high. This condition also serves as an input state,
since any external circuit that writes to the port overcomes the
weak pullup. When software writes a 0 to any port pin, the
DS89C420 activates a strong pulldown that remains on until
either a 1 is written or a reset occurs. Writing a 1 after the port
has been at 0 causes a strong transition driver to turn on,
followed by a weaker sustaining pullup. Once the momentary
strong driver turns off, the port again becomes the output high
(and input) state. The alternate functions of Port 1 are outlined
below.
1
2
40
2
3
41
3
4
42
4
5
43
5
6
44
6
7
1
7
8
2
8
9
3
PORT
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
ALTERNATE FUNCTION
T2 External I/O for Timer/Counter2
T2EX Timer 2 Capture/Reload Trigger
RXD1 Serial Port 1 Receive
TXD1 Serial Port 1 Transmit
INT2 External Interrupt 2 (Positive Edge Detect)
INT3 External Interrupt 3 (Negative Edge Detect)
INT4 External Interrupt 4 (Positive Edge Detect)
INT5 External Interrupt 5 (Negative Edge Detect)
21
24
18 P2.0 (A8) _{Port 2 (A8–15), I/O. Port 2 is an 8-bit, bidirectional I/O port.}
22
25
19 P2.1 (A9) The reset condition of port 2 is logic high. In this state, a weak
23
26
20 P2.2 (A10) ^{pullup holds the port high. This condition also serves as an}
24
27
21 P2.3 (A11) ^{input mode, since any external circuit that writes to the port}
25
28
22 P2.4 (A12) ^{overcomes the weak pullup. When software writes a 0 to any}
port pin, the DS89C420 activates a strong pulldown that
26
29
23 P2.5 (A13) _{remains on until either a 1 is written or a reset occurs. Writing a}
27
30
24 P2.6 (A14) _{1 after the port has been at 0 causes a strong transition driver to}
28
31
25 P2.7 (A15) _{turn on, followed by a weaker sustaining pullup. Once the}
momentary strong driver turns off, the port again becomes both
the output high and input state. As an alternate function, port 2
can function as the MSB of the external address bus when
reading external program memory and read/write external
RAM or peripherals. In page mode 1, port 2 provides both the
MSB and LSB of the external address bus; in page mode 2, it
provides the MSB and data.
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