EP7312_05 Datasheet, PDF (7/64 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced

EP7312
High-Performance, Low-Power System on Chip
The second is the programmable 16- or 32-bit-wide SDRAM
interface that allows direct connection of up to two banks of
SDRAM, totaling 512 Mb. To assure the lowest possible power
consumption, the EP7312 supports self-refresh SDRAMs,
which are placed in a low-power state by the device when it
enters the low-power Standby State. Table 3 shows the
SDRAM Interface pin assignments.
Table 3. SDRAM Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
SDCLK
SDCKE
nSDCS[1:0]
WRITE/nSDRAS
nMOE/nSDCAS
(Note 2)
(Note 2)
nMWE/nSDWE
(Note 2)
A[27:15]/DRA[0:12] (Note 1)
A[14:13]/DRA[12:14]
PD[7:6]/SDQM[1:0] (Note 2)
SDQM[3:2]
D[31:0]
O SDRAM clock output
O SDRAM clock enable output
O SDRAM chip select out
O SDRAM RAS signal output
O SDRAM CAS control signal
O
SDRAM write enable control
signal
O SDRAM address
O SDRAM internal bank select
I/O SDRAM byte lane mask
O SDRAM byte lane mask
I/O Data I/O
Note:
1. Pins A[27:13] map to DRA[0:14] respectively.
(i.e. A[27}/DRA[0}, A[26}/DRA[1], etc.) This is to
balance the load for large memory systems.
2. Pins are multiplexed. See Table 19 on page 11 for
more information.
Digital Audio Capability
The EP7312 uses its powerful 32-bit RISC processing engine
to implement audio decompression algorithms in software. The
nature of the on-board RISC processor, and the availability of
efficient C-compilers and other software development tools,
ensures that a wide range of audio decompression algorithms
can easily be ported to and run on the EP7312
Universal Asynchronous
Receiver/Transmitters (UARTs)
The EP7312 includes two 16550-type UARTs for RS-232
serial communications, both of which have two 16-byte FIFOs
for receiving and transmitting data. The UARTs support bit
rates up to 115.2 kbps. An IrDA SIR protocol encoder/decoder
can be optionally switched into the RX/TX signals to/from
UART 1 to enable these signals to drive an infrared
communication interface directly. Table 4 shows the UART pin
assignments.
Table 4. Universal Asynchronous Receiver/Transmitters Pin
Assignments
Pin Mnemonic
I/O
Pin Description
TXD[1]
RXD[1]
CTS
DCD
DSR
TXD[2]
RXD[2]
LEDDRV
PHDIN
O
UART 1 transmit
I
UART 1 receive
I
UART 1 clear to send
I
UART 1 data carrier detect
I
UART 1 data set ready
O
UART 2 transmit
I
UART 2 receive
O
Infrared LED drive output
I
Photo diode input
Digital Audio Interface (DAI)
The EP7312 integrates an interface to enable a direct
connection to many low cost, low power, high quality audio
converters. In particular, the DAI can directly interface with
the Crystal^‚ CS43L41/42/43 low-power audio DACs and the
Crystal^‚ CS53L32 low-power ADC. Some of these devices
feature digital bass and treble boost, digital volume control and
compressor-limiter functions. Table 5 shows the DAI Interface
pin assignments.
Table 5. DAI Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
SCLK
SDOUT
SDIN
LRCK
MCLKIN
MCLKOUT
O Serial bit clock
O Serial data out
I
Serial data in
O Sample clock
I
Master clock input
O Master clock output
Note: See Table 18 on page 11 for information on pin
multiplexes.
DS508F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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