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EP7312_05 Datasheet, PDF (29/64 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced
JTAG Interface
Parameter
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
EP7312
High-Performance, Low-Power System on Chip
Symbol
tclk_per
tclk_high
tclk_low
tJPs
tJPh
tJPco
tJPzx
tJPxz
Min
2
1
1
-
-
-
-
-
Max
-
-
-
0
3
10
12
19
Units
ns
ns
ns
ns
ns
ns
ns
ns
TCK
TMS
TDI
TDO
tclk_per
tclk_high
tclk_low
tJPh
tJPs
tJPzx
tJPco
Figure 14. JTAG Timing Measurement
tJPxz
DS508F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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