EP7312_05 Datasheet, PDF (39/64 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced

EP7312
High-Performance, Low-Power System on Chip
204-Ball TFBGA Pinout (Top View)
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15
16
17
18
19
20
A VDDIO EXPCLK nCS[3]
nCS[1]
nMWE/
nSDWE
SDQM[2
]
nSDCS[1]
DD[2]
FRM
CL[1] GNDCORE D[1] A[2] D[4] A[5] nPWRFL MOSCOUT GNDIO GNDIO GNDIO A
B WORD
VDDIO
nCS[5]
nCS[2]
nMOE/
nSDCAS
SDCKE
nSDCS[0]
DD[1]
M
CL[2]
D[0] A[1] D[3] A[4] D[6] WAKEUP MOSCIN GNDIO GNDIO nURESET B
C
RUN/
CLKEN
EXPRDY
VDDIO
nCS[4] nCS[0] SDCLK SDQM[3] DD[0]
DD[3]
VDDCORE A[0]
D[2] A[3] D[5] A[6] GNDOSC VDDOSC GNDIO
BATOK
nPOR C
D PB[7] RXD[2] VDDIO
GNDIO nBATCHG A[7] D
E PB[4]
TXD[2]
WRITE/
nSDRAS
nMEDCHG/n
BROM
nEXTPWR
D[9]
E
F PB[3] PB[6] TDI
D[7]
A[8]
D[10] F
G PB[1] PB[2] PB[5]
D[8]
A[9]
D[11] G
H PA[7] TDO PB[0]
A[10] D[12] A[12] H
J PA[4] PA[5] PA[6]
A[11]
D[13]
A[13]/
DRA[14]
J
K PA[1] PA[2] VDDIO
D[14]
A[14]/
DRA[13]
D[15] K
L TXD[1] LEDDRV PA[3]
VDDIO
D[16]
A[16]/
DRA[11]
L
M RXD[1] CTS PA[0]
A[15]/ A[17]/
DRA[12] DRA[10]
nTRST M
N DSR nTEST[1] PHDIN
D[17]
D[19]
A[18]/
DRA[9]
N
P EINT[3] nEINT[2] DCD
D[18]
A[20]/
DRA[7]
D[20] P
R nEXTFIQ
PE2/
CLKSEL
nTEST[0]
A[19]/
DRA[8]
D[22]
A[21]/
DRA6
R
PE[1]/
T BOOT
SEL[1]
PE[0]/
BOOT nEINT[1]
SEL[0]
D[21]
D[23]
A[22]/
DRA5
T
U GNDRTC RTCOUT RTCIN
HALF
WORD
D[24]
A[23]/
DRA4
U
V VDDRTC GNDIO
GNDIO
PD[7]/
SDQM[1]
PD[4]
PD[2]
SSICLK
SSIRXD
A
nADCCS
VDDIO ADCCLK COL[7] COL[4] TCLK BUZ
D[29]
A[26]/
DRA[1]
VDDIO
VDDIO
A[24]/
DRA3
V
W GNDIO
GNDIO
GNDIO
PD[6]/
SDQM[0]
TMS
PD[1] SSITXFR SSIRXFR GNDCORE DRIVE[1] ADCOUT FB[0] COL[5] COL[2] COL[0]
D[30]
A[27]/
DRA[0]
D[26]
VDDIO D[25] W
Y GNDIO GNDIO GNDIO
PD[5]
PD[0]/
PD[3] LED SSITXDA ADCIN VDDCORE
FLSH
DRIVE[0] SMPCLK FB[1] COL[6] COL[3] COL[1]
D[31]
D[28]
D[27]
A[25]/
DRA[2]
VDDIO Y
DS508F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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