EP7312_05 Datasheet, PDF (41/64 Pages) Cirrus Logic – High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced

Ball Location
Name
B14
A[4]
B15
D[6]
B16
WAKEUP
B17
MOSCIN
B18
VSSIO
B19
VSSIO
B20
nURESET
C1
RUN/CLKEN
C2
EXPRDY
C3
VDDIO
C4
nCS[4]
C5
nCS[0]
C6
SDCLK
C7
SDQM[3]
C8
DD[0]
C9
DD[3]
C10
VDDCORE
C11
A[0]
C12
D[2]
C13
A[3]
C14
D[5]
C15
A[6]
C16
VSSOSC
C17
VDDOSC
C18
VSSIO
C19
BATOK
EP7312
High-Performance, Low-Power System on Chip
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Strength^†
1
1
Schmitt
Reset
State
Low
Low
Schmitt
1
Low
1
1
High
1
High
2
Low
2
Low
1
Low
1
Low
2
Low
1
Low
2
Low
1
Low
1
Low
Type
Description
O
I/O
I
I
Pad ground
Pad ground
I
0
I
Pad power
O
O
O
O
O
O
Core power
O
I/O
O
I/O
O
Oscillator ground
Oscillator power
Pad ground
I
System byte address
Data I/O
System wake up input
Main oscillator input
I/O ground
I/O ground
User reset input
Run output / clock enable output
Expansion port ready input
Digital I/O power,
3.3 V
Chip select 4
Chip select 0
SDRAM clock out
SDRAM byte lane mask
LCD serial display data
LCD serial display data
Digital core power, 2.5 V
System byte address
Data I/O
System byte address
Data I/O
System byte address
PLL ground
Oscillator power in, 2.5V
I/O ground
Battery ok input
DS508F1
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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