SAMA5D42_14 Datasheet, PDF (61/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

If the secure ROM code finds a bootable program, it automatically disables ROM access and enables the JTAG
connection just before launching the program.
The procedure to enable JTAG access is as follows:
 Connect your computer to the board with JTAG and USB (J20 USB-A)
 Power on the chip
 Open a terminal console (TeraTerm or HyperTerminal, etc.) on your computer and connect to the USB CDC
Serial COM port related to the J20 connector on the board
 Send the '#' character. You will see then the prompt '>' character sent by the device (indicating that the
Standard SAM-BA Monitor is running)
 Use the Standard SAM-BA Monitor to connect to the chip with JTAG
Note that you don't need to follow this sequence in order to connect the Standard SAM-BA Monitor with USB.
11.6.5 Debug Unit
The Debug Unit provides a two-pin (DXRD and TXRD) USART that can be used for several debug and trace
purposes and offers an ideal means for in-situ programming solutions and debug monitor communication.
Moreover, the association with two peripheral data controller channels permits packet handling of these tasks with
processor time reduced to a minimum.
The Debug Unit also manages the interrupt handling of the COMMTX and COMMRX signals that come from the
ICE and that trace the activity of the Debug Communication Channel.The Debug Unit allows blockage of access to
the system through the ICE interface.
A specific register, the Debug Unit Chip ID Register, gives information about the product version and its internal
configuration.
For further details on the Debug Unit, see the Debug Unit section.
11.6.6 IEEE 1149.1 JTAG Boundary Scan
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device packaging technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE, EXTEST and BYPASS
functions are implemented. In ICE debug mode, the ARM processor responds with a non-JTAG chip ID that
identifies the processor to the ICE system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be performed after
JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
SAMA5D4 Series [DATASHEET]
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Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14