SAMA5D42_14 Datasheet, PDF (1707/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

56.3
Power Consumption
 Typical power consumption of PLLs, Slow Clock and Main Oscillator
 Power consumption of power supply in four different modes: Active, Idle, Ultra Low-power and Backup
 Power consumption by peripheral: calculated as the difference in current measurement after having enabled
then disabled the corresponding clock
 Software used for power consumption measurements: Dhrystone / Coremark
56.3.1 Active Mode
Active Mode is the normal running mode with the core clock running off a PLL. The power management controller
can be used to adapt the frequency and to disable the peripheral clocks.
Table 56-5 represents the power consumption estimated on the power supplies.
56.3.2 Low-power Modes
The various low-power modes are described below:
56.3.2.1 Backup Mode
The purpose of Backup Mode is to achieve the lowest power consumption possible in a system which is
performing periodic wake-ups to perform tasks but not requiring fast start-up time.
The Zero-power Power-on Reset, RTC, Backup registers and 32 kHz oscillator (RC or Crystal Oscillator selected
by software in the Supply Controller) are running. The core supply is off.
The system can be awakened from this mode through the WKUP0 pin or an RTC wake-up event.
Backup mode is entered with the help of the Shutdown Controller that asserts the SHDN output pin. The SHDN pin
is to be connected to the Enable of the VDDCORE regulator.
Exit from Backup mode happens if one of the following enable wake-up events occurs:
 WKUP0 pin (level transition, configurable debouncing)
 RTC alarm
The system will restart as for a reset event.
56.3.2.2 Idle Mode
The purpose of Idle Mode is to optimize power consumption of the device versus response time. In this mode, only
the core clock is stopped. The peripheral clocks, including the DDR Controller clock, can be enabled. The current
consumption in this mode is application dependent.
This mode is entered via the Wait for Interrupt (WFI) instruction and PCK disabling.
The processor can be awakened from an interrupt. The system will resume where it was before entering in WFI
mode.
Table 56-6 represents the power consumption estimated on the power supplies.
56.3.2.3 Ultra Low-power Mode
The purpose of Ultra Low-power Mode is to reduce the power consumption of the device to the minimum without
disconnecting VDDCORE power supply. It is a combination of very low frequency operations and Idle Mode.
This mode is entered via the following steps:
1. Set the DDR in Self Refresh Mode
2. Reduce the system clock (PCK and MCK) to the minimum with the help of the PMC:
̶ PCK and MCK configuration is to be defined regarding the expected power consumption and wake-up
time. Please refer to Table 56-7 for details.
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
1707