SAMA5D42_14 Datasheet, PDF (1591/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

50.4.4 Last Output Data Mode
This mode is used to generate cryptographic checksums on data (MAC) by means of cipher block chaining
encryption algorithm (CBC-MAC algorithm for example).
After each end of encryption/decryption, the output data are available either on the AES_ODATARx for Manual
and Auto mode or at the address specified in the receive buffer pointer for DMA mode (See Table 50-4 “Last
Output Data Mode Behavior versus Start Modes”).
The Last Output Data (LOD) bit in the AES_MR allows retrieval of only the last data of several
encryption/decryption processes.
Therefore, there is no need to define a read buffer in DMA mode.
This data are only available on the AES_ODATARx.
50.4.4.1 Manual and Auto Modes
If AES_MR.LOD = 0
The DATRDY flag is cleared when at least one of the AES_ODATARx is read (See Figure 50-1).
Figure 50-1.
Manual and Auto Modes with AES_MR.LOD = 0
Write START bit in AES_CR (Manual mode)
or
Write AES_IDATARx register(s) (Auto mode)
Read the AES_ODATARx
DATRDY
Encryption or Decryption Process
If the user does not want to read the AES_ODATARx between each encryption/decryption, the DATRDY flag will
not be cleared. If the DATRDY flag is not cleared, the user cannot know the end of the following
encryptions/decryptions.
If AES_MR.LOD = 1
This mode is optimized to process AES CPC-MAC operating mode.
The DATRDY flag is cleared when at least one AES_IDATAR is written (See Figure 50-2). No more
AES_ODATAR reads are necessary between consecutive encryptions/decryptions.
Figure 50-2.
Manual and Auto Modes with AES_MR.LOD = 1
Write START bit in AES_CR (Manual mode)
or
Write AES_IDATARx register(s) (Auto mode)
Write AES_IDATARx register(s)
DATRDY
50.4.4.2 DMA Mode
If AES_MR.LOD = 0
Encryption or Decryption Process
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
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