EP2AGX260EF29I3N Datasheet, PDF (61/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
1–61
Periphery Performance
This section describes periphery performance, including high-speed I/O, external
memory interface, and IOE programmable delay.
I/O performance supports several system interfaces, for example the high-speed I/O
interface, external memory interface, and the PCI/PCI-X bus interface. I/O using
SSTL-18 Class I termination standard can achieve up to the stated DDR2 SDRAM
interfacing speed with typical DDR2 SDRAM memory interface setup. I/O using
general purpose I/O (GPIO) standards such as 3.0, 2.5, 1.8, or 1.5 LVTTL/LVCMOS
are capable of typical 200 MHz interfacing frequency with 10pF load.
1 Actual achievable frequency depends on design- and system-specific factors. You
should perform HSPICE/IBIS simulations based on your specific design and system
setup to determine the maximum achievable frequency in your system.
High-Speed I/O Specification
Table 1–53 lists the high-speed I/O timing for Arria II GX devices.
Table 1–53. High-Speed I/O Specifications for Arria II GX Devices (Part 1 of 4)
Symbol
Conditions
I3
Min Max
C4
Min Max
C5,I5
C6
Unit
Min Max Min Max
Clock
f_{HSCLK_IN}
(input clock
frequency)–Row
I/O
Clock boost
factor, W =
1 to 40 (1)
5
670
5
670
5
622
5
500 MHz
f_{HSCLK_IN}
(input clock
frequency)–
Column I/O
Clock boost
factor, W =
5
500
5
500
5 472.5 5 472.5 MHz
1 to 40 (1)
f_{HSCLK_OUT}
(output clock
frequency)–Row
—
I/O
5
670
5
670
5
622
5
500 MHz
f_{HSCLK_OUT}
(output clock
frequency)–
Column I/O
—
5
500
5
500
5 472.5 5 472.5 MHz
December 2013 Altera Corporation
Arria II Device Handbook Volume 3: Device Datasheet and Addendum