EP2AGX260EF29I3N Datasheet, PDF (19/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

Chapter 1: Device Datasheet for Arria II Devices
Electrical Characteristics
1–19
Table 1–30 lists the HSTL I/O standards for Arria II GX devices.
Table 1–30. Differential HSTL I/O Standards for Arria II GX Devices
I/O Standard
HSTL-18 Class I
HSTL-15 Class I, II
HSTL-12 Class I, II
V_CCIO (V)
V_DIF(DC) (V)
Min Typ Max Min Max
1.71 1.8 1.89 0.2 —
1.425 1.5 1.575 0.2 —
1.14 1.2 1.26 0.16 —
V_X(AC) (V)
Min Typ Max
0.85 — 0.95
0.71 — 0.79
—
0.5 ×
V_CCIO
—
V_CM(DC) (V)
Min Typ Max
0.88 — 0.95
0.71 — 0.79
0.48
×
V_CCIO
0.5 ×
V_CCIO
0.52 ×
V_CCIO
V_DIF(AC) (V)
Min Max
0.4 —
0.4 —
0.3 —
Table 1–31 lists the HSTL I/O standards for Arria II GZ devices.
Table 1–31. Differential HSTL I/O Standards for Arria II GZ Devices
I/O Standard
HSTL-18 Class I
HSTL-15 Class I, II
V_CCIO (V)
Min Typ Max
1.71 1.8 1.89
1.425 1.5 1.575
V_DIF(DC) (V)
Min Max
0.2 —
0.2 —
V_X(AC) (V)
Min Typ Max
0.78 — 1.12
0.68 — 0.9
HSTL-12 Class I, II
1.14
1.2
1.26
0.16
V_CCIO
+ 0.3
—
0.5 ×
V_CCIO
—
V_CM(DC) (V)
Min Typ Max
0.78 — 1.12
0.68 —
0.9
0.4 ×
V_CCIO
0.5 ×
V_CCIO
0.6 ×
V_CCIO
V_DIF(AC) (V)
Min Max
0.4 —
0.4 —
V_CCIO
0.3 +
0.48
Table 1–32 lists the differential I/O standard specifications for Arria II GX devices.
Table 1–32. Differential I/O Standard Specifications for Arria II GX Devices (Note 1)
I/O
Standard
V_CCIO (V)
Min Typ Max
V_ID (mV)
V_ICM (V) (2)
Min Cond. Max Min Max
V_OD (V) (3)
Min Typ Max
V_OCM (V)
Min Typ Max
2.5 V
LVDS
2.375 2.5 2.625
100
V_CM =
1.25 V
—
0.05 1.80 0.247 —
0.6
1.125 1.25 1.375
RSDS (4) 2.375 2.5 2.625 —
— — — — 0.1 0.2 0.6 0.5 1.2 1.4
Mini-LVDS
(4)
2.375
2.5 2.625
—
— — — — 0.25 — 0.6
1 1.2 1.4
LVPECL
(5)
2.375 2.5 2.625 300
—
— 0.6 1.8 — — —
———
BLVDS (6) 2.375 2.5 2.625 100 — — — — — — — — — —
Notes to Table 1–32:
(1) The 1.5 V PCML transceiver I/O standard specifications are described in “Transceiver Performance Specifications” on page 1–21.
(2) V_IN range: 0 <= V_IN <= 1.85 V.
(3) R_L range: 90 <= RL <= 110  .
(4) The RSDS and mini-LVDS I/O standards are only supported for differential outputs.
(5) The LVPECL input standard is supported at the dedicated clock input pins (GCLK) only.
(6) There are no fixed V_ICM, V_OD, and V_OCM specifications for BLVDS. These specifications depend on the system topology.
December 2013 Altera Corporation
Arria II Device Handbook Volume 3: Device Datasheet and Addendum