EP2AGX260EF29I3N Datasheet, PDF (22/78 Pages) Altera Corporation – Device Datasheet for Arria II Devices

Table 1–34. Transceiver Specifications for Arria II GX Devices (Note 1) (Part 2 of 7)
Symbol/
Description
Condition
Spread-spectrum
downspread
PCIe
On-chip
termination
—
resistors
V_ICM
(AC coupled)
—
V_ICM
(DC coupled)
HCSL I/O
standard for
PCIe
reference
clock
10 Hz
Transmitter
REFCLK Phase
Noise
100 Hz
1 KHz
10 KHz
100 KHz
1 MHz
Transmitter
REFCLK Phase
Jitter (rms) for
100 MHz
REFCLK (3)
10 KHz to
20 MHz
R_ref
—
I3
C4
Min
Typ
Max Min Typ
Max
—
0 to
–0.5%
—
—
0 to
–0.5%
—
—
100
—
— 100
—
1100 ± 5%
1100 ± 5%
250
—
550 250 —
550
—
—
-50
—
—
-50
—
—
-80
—
—
-80
—
—
-110
—
—
-110
—
—
-120
—
—
-120
—
—
-120
—
—
-120
—
—
-130
—
—
-130
—
—
3
—
—
3
—
2000
± 1%
—
—
2000
± 1%
—
Transceiver Clocks
Calibration block
clock frequency
—
(cal_blk_clk)
10
—
125
10
—
125
C5 and I5
C6
Unit
Min
Typ
Max Min Typ Max
—
0 to
–0.5%
—
—
0 to
–0.5%
—
—
—
100
—
— 100
—

1100 ± 5%
1100 ± 5%
mV
250
—
550 250 —
550
mV
—
—
-50
——
-50 dBc/Hz
—
—
-80
——
-80 dBc/Hz
—
—
-110
—
—
-110 dBc/Hz
—
—
-120
—
—
-120 dBc/Hz
—
—
-120
—
—
-120 dBc/Hz
—
—
-130
—
—
-130 dBc/Hz
—
—
3
——
3
ps
—
2000
± 1%
—
—
2000 ±
1%
—

10
—
125
10 —
125
MHz