EP2S180F1508I4 Datasheet, PDF (52/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

Digital Signal Processing Block
Modes of Operation
The adder, subtractor, and accumulate functions of a DSP block have four
modes of operation:
■ Simple multiplier
■ Multiply-accumulator
■ Two-multipliers adder
■ Four-multipliers adder
Table 2–6 shows the different number of multipliers possible in each DSP
block mode according to size. These modes allow the DSP blocks to
implement numerous applications for DSP including FFTs, complex FIR,
FIR, and 2D FIR filters, equalizers, IIR, correlators, matrix multiplication
and many other functions. The DSP blocks also support mixed modes
and mixed multiplier sizes in the same block. For example, half of one
DSP block can implement one 18 × 18-bit multiplier in multiply-
accumulator mode, while the other half of the DSP block implements four
9 × 9-bit multipliers in simple multiplier mode.
Table 2–6. Multiplier Size & Configurations per DSP Block
DSP Block Mode
Multiplier
Multiply-accumulator
Two-multipliers adder
Four-multipliers adder
9×9
18 × 18
36 × 36
Eight multipliers with
eight product outputs
Four multipliers with four One multiplier with one
product outputs
product output
-
Two 52-bit multiply-
-
accumulate blocks
Four two-multiplier adder Two two-multiplier adder
-
(two 9 × 9 complex
(one 18 × 18 complex
multiply)
multiply)
Two four-multiplier adder One four-multiplier adder
-
DSP Block Interface
Stratix II device DSP block input registers can generate a shift register that
can cascade down in the same DSP block column. Dedicated connections
between DSP blocks provide fast connections between the shift register
inputs to cascade the shift register chains. You can cascade registers
within multiple DSP blocks for 9 × 9- or 18 × 18-bit FIR filters larger than
four taps, with additional adder stages implemented in ALMs. If the DSP
block is configured as 36 × 36 bits, the adder, subtractor, or accumulator
stages are implemented in ALMs. Each DSP block can route the shift
register chain out of the block to cascade multiple columns of DSP blocks.
2–44
Stratix II Device Handbook, Volume 1
Altera Corporation
May 2007