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EP2S180F1508I4 Datasheet, PDF (234/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet | |||
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Document Revision History
Table 5â103. Document Revision History (Part 2 of 3)
Date and
Document
Version
Changes Made
Summary of Changes
August, 2006, Updated Table 5â73, Table 5â75, Table 5â77,
â
v4.2
Table 5â78, Table 5â79, Table 5â81, Table 5â85, and
Table 5â87.
April 2006, v4.1
â Updated Table 5â3.
â Updated Table 5â11.
â Updated Figures 5â8 and 5â9.
â Added parallel on-chip termination information to
âOn-Chip Termination Specificationsâ section.
â Updated Tables 5â28, 5â30,5â31, and 5â34.
â Updated Table 5â78, Tables 5â81 through 5â90,
and Tables 5â92, 5â93, and 5â98.
â Updated âPLL Timing Specificationsâ section.
â Updated âExternal Memory Interface
Specificationsâ section.
â Added Tables 5â95 and 5â101.
â Updated âJTAG Timing Specificationsâ section,
including Figure 5â10 and Table 5â102.
â Changed 0.2 MHz to 2 MHz in
Table 5â93.
â Added new spec for half period
jitter (Table 5â101).
â Added support for PLL clock
switchover for industrial
temperature range.
â Changed fI N P F D (min) spec from
4 MHz to 2 MHz in Table 5â92.
â Fixed typo in tO U T J I T T E R
specification in Table 5â92.
â Updated VD I F AC & DC max
specifications in Table 5â28.
â Updated minimum values for tJ C H ,
tJ C L , and tJ P S U in Table 5â102.
â Update maximum values for tJ P C O,
tJ P Z X , and tJ P X Z in Table 5â102.
December 2005, â Updated âExternal Memory Interface
â
v4.0
Specificationsâ section.
â Updated timing numbers throughout chapter.
July 2005, v3.1 â Updated HyperTransport technology information in
â
Table 5â13.
â Updated âTiming Modelâ section.
â Updated âPLL Timing Specificationsâ section.
â Updated âExternal Memory Interface
Specificationsâ section.
May 2005, v3.0 â Updated tables throughout chapter.
â
â Updated âPower Consumptionâ section.
â Added various tables.
â Replaced âMaximum Input & Output Clock Rateâ
section with âMaximum Input & Output Clock Toggle
Rateâ section.
â Added âDuty Cycle Distortionâ section.
â Added âExternal Memory Interface Specificationsâ
section.
March 2005,
Updated tables in âInternal Timing Parametersâ
â
v2.2
section.
January 2005, Updated input rise and fall time.
â
v2.1
5â98
Stratix II Device Handbook, Volume 1
Altera Corporation
April 2011
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