EP2S180F1508I4 Datasheet, PDF (31/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

Stratix II Architecture
The direct link interconnect allows an LAB, DSP block, or TriMatrix
memory block to drive into the local interconnect of its left and right
neighbors and then back into itself. This provides fast communication
between adjacent LABs and/or blocks without using row interconnect
resources.
The R4 interconnects span four LABs, three LABs and one M512 RAM
block, two LABs and one M4K RAM block, or two LABs and one DSP
block to the right or left of a source LAB. These resources are used for fast
row connections in a four-LAB region. Every LAB has its own set of R4
interconnects to drive either left or right. Figure 2–16 shows R4
interconnect connections from an LAB. R4 interconnects can drive and be
driven by DSP blocks and RAM blocks and row IOEs. For LAB
interfacing, a primary LAB or LAB neighbor can drive a given R4
interconnect. For R4 interconnects that drive to the right, the primary
LAB and right neighbor can drive on to the interconnect. For R4
interconnects that drive to the left, the primary LAB and its left neighbor
can drive on to the interconnect. R4 interconnects can drive other R4
interconnects to extend the range of LABs they can drive. R4
interconnects can also drive C4 and C16 interconnects for connections
from one row to another. Additionally, R4 interconnects can drive R24
interconnects.
Figure 2–16. R4 Interconnect Connections Notes (1), (2), (3)
R4 Interconnect
Driving Left
Adjacent LAB can
Drive onto Another
LAB's R4 Interconnect
C4 and C16
Column Interconnects (1)
R4 Interconnect
Driving Right
LAB
Neighbor
Primary
LAB (2)
LAB
Neighbor
Notes to Figure 2–16:
(1) C4 and C16 interconnects can drive R4 interconnects.
(2) This pattern is repeated for every LAB in the LAB row.
(3) The LABs in Figure 2–16 show the 16 possible logical outputs per LAB.
Altera Corporation
May 2007
2–23
Stratix II Device Handbook, Volume 1