EP3C40F324C7N Datasheet, PDF (219/274 Pages) Altera Corporation – Chapter Revision Dates

Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
9–61
I/O Reconfiguration
Use the CONFIG_IO instruction to reconfigure the I/O configuration shift register
(IOCSR) chain. This instruction allows you to perform board-level testing prior to
configuring the Cyclone III device family or waiting for a configuration device to
complete configuration. After the configuration is interrupted and JTAG testing is
complete, the part must be reconfigured using the PULSE_NCONFIG JTAG instruction
or by pulsing the nCONFIG pin low.
You can issue the CONFIG_IO instruction any time during user mode. The CONFIG_IO
instruction cannot be issued when nCONFIG pin is asserted low (during power up) or
immediately after issuing a JTAG instruction that triggers reconfiguration. For more
information about the wait-time for issuing the CONFIG_IO instruction, refer to
Table 9–18.
When using CONFIG_IO instruction, you must meet the following timing restrictions:
■ CONFIG_IO instruction cannot be issued during the nCONFIG pin low
■ Observe 230 s minimum wait time after any of the following conditions are met:
■ nCONFIG pin goes high
■ Issuing the PULSE_NCONFIG instruction
■ Issuing the ACTIVE_ENGAGE instruction, before issuing the CONFIG_IO instruction
■ Wait 230 s after power up with nCONFIG pin high before issuing the CONFIG_IO
instruction (or wait for the nSTATUS pin to go high)
Table 9–18. Wait Time for Issuing the CONFIG_IO Instruction
Wait Time
Wait time after the nCONFIG pin is released
Wait time after PULSE_NCONFIG or ACTIVE_ENGAGE is
issued
Time
230 s
230 s
Use the ACTIVE_DISENGAGE instruction with CONFIG_IO instruction to interrupt
configuration. Table 9–19 lists the sequence of instructions to use for various
CONFIG_IO usage scenarios.
Table 9–19. JTAG CONFIG_IO (without JTAG_PROGRAM) Instruction Flows ⁽¹⁾ (Part 1 of 2)
Configuration Scheme and Current State of the Cyclone III Device Family
JTAG Instruction
Prior to User Mode
(Interrupting
Configuration)
User Mode
Power Up
PS FPP AS
AP
(4)
PS
FPP
AS
AP
(4)
PS
FPP AS
AP
(4)
FACTORY
ACTIVE_DISENGAGE
CONFIG_IO
JTAG Boundary Scan Instructions (no
JTAG_PROGRAM)
NA NA NA NA NA NA NA NA R R R NA
O O O O O O O O — — ——
R R R R R R R R NA NA NA NA
O O O O O O O O — — ——
August 2012 Altera Corporation
Cyclone III Device Handbook
Volume 1