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EP2S90F1020C4N Datasheet, PDF (147/238 Pages) Altera Corporation – The Stratix II family offers the following features
DC & Switching Characteristics
Table 5–17. SSTL-18 Class II Specifications
Symbol
Parameter
Conditions
Minimum
Typical Maximum Unit
VCCIO Output supply voltage
VREF
Reference voltage
VTT
Termination voltage
VIH (DC) High-level DC input voltage
VIL (DC) Low-level DC input voltage
VIH (AC) High-level AC input voltage
VIL (AC) Low-level AC input voltage
VOH
High-level output voltage
VOL
Low-level output voltage
IOH = –13.4 mA (1)
IOL = 13.4 mA (1)
1.71
0.855
VREF – 0.04
VREF + 0.125
VREF + 0.25
VCCIO – 0.28
1.80
0.900
VREF
1.89
V
0.945
V
VREF + 0.04 V
V
VREF – 0.125 V
V
VREF – 0.25 V
V
0.28
V
Note to Table 5–17:
(1) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Table 5–18. SSTL-18 Class I & II Differential Specifications
Symbol
Parameter
Conditions Minimum
Typical
VCCIO Output supply voltage
VSWING DC differential input voltage
(DC)
VX (AC) AC differential input cross
point voltage
VSWING AC differential input voltage
(AC)
VISO
Input clock signal offset
voltage
ΔVISO
Input clock signal offset
voltage variation
VOX
(AC)
AC differential cross point
voltage
1.71
1.80
0.25
(VCCIO/2) – 0.175
0.5
0.5 × VCCIO
±200
(VCCIO/2) – 0.125
Maximum Unit
1.89
V
V
(VCCIO/2) + 0.175 V
V
V
mV
(VCCIO/2) + 0.125 V
Altera Corporation
April 2011
5–11
Stratix II Device Handbook, Volume 1