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AK4673 Datasheet, PDF (93/107 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
[AK4673]
SYSTEM DESIGN
Figure 83 and Figure 84 shows the system connection diagram for the AK4673. The evaluation board [AKD4673] is
demonstrates the optimum layout, power supply arrangements and measurement results.
Power Supply
2.6 ~ 5.25V
Headphone
Power Supply
1.6 ~ 3.6V
10u
Power Supply
2.6 ~ 3.6V
10u
10 0.22u
10 0.22u
1u
0.1u
μP
Line In
Line Out
Mono In
External
MIC
Internal MIC
NC MUTET HPL HVDD SCLT CADT NC MCKI NC
1u
External
SPK-Amp 1u
RIN4
NC
HPR VSS2 SDAT PENIRQN NC MCKO NC
ROUT LIN4
NC TVDD1
LOUT MIN
NC
RIN2
AK4673EG
TVDD2 DVDD
NC VSS3
TSVDD LIN2
LRCK BICK
LIN1
NC
NC
SDTI SDTO
VCOM RIN1 MPWR I2CA VCOC NC
PDN SCLA SDAA
2.2u 0.1u
NC VSS1 AVDD XP
YP
XN
YN CADA NC
0.1u
0.1u
0.1u
DSP
μP
Power Supply
2.5 ~ 3.6V
10u
Cp
Rp
Touch Screen
Analog Ground Digital Ground
Notes:
- VSS1, VSS2 and VSS3 pins of the AK4673 should be distributed separately from the ground of external
controllers.
- All digital input pins should not be left floating.
- When the AK4673 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of the VCOC/RIN3 pin is not
needed.
- When the AK4673 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of the VCOC/RIN3 pin should be
connected as shown in Table 5.
- When the AK4673 is used at master mode, LRCK and BICK pins are floating before M/S bit is changed to “1”.
Therefore, 100kΩ around pull-up resistor should be connected to LRCK and BICK pins of the AK4673.
- 0.1μF ceramic capacitor should be attached to each supply pins. The type of other capacitors is not critical.
- When DVDD is supplied from AVDD via 10Ω series resistor, the capacitor larger than 0.1μF should not be
connected between DVDD and the ground.
Figure 83. Typical Connection Diagram (AIN3 bit = “0”, MIC Input)
MS0670-E-00
- 93 -
2007/09