AK4673 Datasheet, PDF (73/107 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP and Touch Screen Controller

[AK4673]
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 67 Bit Transfer on the I2C-Bus
[ACKNOWLEDGE]
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The transmitting device will
release the SDA line (HIGH) after transmitting eight bits. The receiver must pull down the SDA line during the
acknowledge clock pulse so that that it remains stable “L” during “H” period of this clock pulse. The AK4673 will
generates an acknowledge after each byte is received.
In the read mode, the slave, AK4673 will transmit eight bits of data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no STOP condition is generated by the master, the slave will continue to
transmitting the data. If an acknowledge is not detected, the slave will terminate further data transmissions and await the
STOP condition.
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
not acknowledge
acknowledge
SCL FROM
MASTER
1
2
S
START
CONDITION
8
9
clock pulse for
acknowledgement
A) TSC Control
Figure 68 Acknowledge
[Address Byte]
The sequence of writing data is shown Figure 71. The address byte, which includes seven bits of slave address and one bit
of R/W bit, is sent after the START condition. If the transmitted slave address matches an address for one of the device,
the receiver which was addressed pulls down the SDA line (acknowledge).
The most significant six bits of the slave address are fixed as “100100”. The next one bit is CADT (device address bit).
This bit identifies the specific device on the bus. The hard-wired input pin (CADT pin) sets CADT bit. The eighth bit
(LSB) of the address byte (R/W bit) defines whether the master requests a write or read operation. A “1” indicates that the
read operation is to be executed. A “0” indicates that the write operation is to be executed.
MS0670-E-00
1
0
0
1
0
0 CADT R/W
(CADT should match with CADT pins)
Figure 69 Address Byte
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