AK4673 Datasheet, PDF (20/107 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP and Touch Screen Controller

■ Timing Diagram
MCKI
1/fCLK
tCLKH
tCLKL
1/fs
VIH2
VIL2
LRCK
tLRCKH
tLRCKL
tBCK
50%TVDD2
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
BICK
tBCKH
tBCKL
1/fMCK
50%TVDD2
dBCK = tBCKH / tBCK x 100
tBCKL / tBCK x 100
MCKO
50%TVDD2
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 3. Clock Timing (PLL/EXT Master mode)
Note 37. MCKO is not available at EXT Master mode.
[AK4673]
LRCK
tLRCKH
tDBF
50%TVDD2
BICK
(BCKP = "0")
50%TVDD2
BICK
(BCKP = "1")
SDTO
SDTI
tBSD
tSDS
MSB
tSDH
50%TVDD2
50%TVDD2
VIH2
VIL2
Figure 4. Audio Interface Timing (PLL/EXT Master mode, DSP mode, MSBS = “0”)
MS0670-E-00
- 20 -
2007/09