AK4343VN Datasheet, PDF (93/99 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

[AK4343]
■ Ϩγʔόग़ྗ
FS3-0 bits _0,000
(Addr:05H, D5&D2-0)
(1)
RCV bit
(Addr:21H, D0)
DACL bit
(Addr:02H, D4)
IVL/R7-0 bits
(Addr:09H&0CH, D7-0)
DVL/R7-0 bits
(Addr:0AH&0DH, D7-0)
PMDAC bit
(Addr:00H, D2)
PMMIN bit
(Addr:00H, D5)
PMLO bit
(Addr:00H, D3)
LOPS bit
(Addr:03H, D6)
(2)
(3)
E1H
18H
(5)
(6)
(7)
(8)
(4)
RCP pin
Hi-Z
1,111
91H
28H
(9)
Normal Output
(10)
(11)
Hi-Z
Example:
PLL Master Mode
Audio I/F Format: MSB justified (ADC & DAC)
Sampling Frequency: 44.1kHz
Digital Volume: −8dB
LOVL = MINL bits = “0”
(1) Addr:05H, Data:27H
(2) Addr:21H, Data:01H
(3) Addr:02H, Data:10H
(4) Addr:03H, Data:40H
(5) Addr:09H & 0CH, Data:91H
(6) Addr:0AH & 0DH, Data:28H
(7) Addr:00H, Data:6CH
(8) Addr:03H, Data:00H
Playback
(9) Addr:03H, Data:40H
(10) Addr:02H, Data:00H
RCN pin
Hi-Z
VCOM Normal Output VCOM Hi-Z
(11) Addr:00H, Data:40H
Figure 83. Receiver-Amp Output Sequence
<खॱྫ>
ʮΫϩοΫͷઃఆʯͷ߲Λࢀর͠ɺΫϩοΫΛͯ͠څڙԼ͍͞ɻ
(1) αϯϓϦϯάप೾਺(FS3-0 bits)Λઃఆͯ͠Լ͍͞ɻPLLϞʔυͷ৔߹ɺαϯϓϦϯάप೾਺Λมߋ
͔ͯ͠ΒͷPLLϩοΫ࣌ؒΛߟྀ͠ɺ(5)ͷDACͼٴϨγʔόͷύϫʔΞοϓΛߦͬͯԼ͍͞ɻ
(2) DAC Æ RCV-Ampͷύεͷઃఆ͓ΑͼύϫʔηʔϒϞʔυઃఆ: DACL=LOPS bit = “0” Æ “1”
(3) RCV-Ampઃఆ: RCV bit = “1”
(4) DAC Æ RCV-Ampͷύεͷઃఆ: DACL bit = “0” Æ “1”
(5) ύϫʔηʔϒϞʔυઃఆ: LOPS bit = “0” Æ “1”
(6) ALC෦σΟδλϧϘϦϡʔϜ(ΞυϨε09H&0CH)ͷઃఆ
AVL7-0 = AVR7-0 bits = “91H”(0dB)ʹઃఆͯ͠Լ͍͞ɻ
(7) ग़ྗσΟδλϧϘϦϡʔϜ(ΞυϨε0AH&0DH)ͷઃఆɻ
DVOLC bit = “1”(default)ͷͱ͖ɺDVL7-0bits(0AH)ͰLch͓ΑͼRchͷ྆ํͷϘϦϡʔϜΛઃఆ͠·
͢ɻDAC͕ύϫʔΞοϓ͞ΕͨޙɺDefault஋(0dB)͔Βઃఆͨ͠஋ʹιϑτભҠ͍͖ͯ͠·͢ɻ
(8) DAC, MIN-AmpͼٴϨγʔόͷύϫʔΞοϓ: PMDAC = PMMIN = PMLO bits = “0” → “1”
ظॳԽαΠΫϧத(1059/fs=24ms@fs=44.1kHz)ɺDACೖྗσʔλ͸಺෦Ͱ2’sίϯϓϦϝϯτͷ “0”ʹ
ݻఆ͞Ε·͢ɻॳظԽαΠΫϧ͕ऴྃ͢ΔͱɺDACͷ܈஗Ԇ(25/fs=0.5ms@fs=44.1kHz)ܦաޙɺDAC
ग़ྗ͸σΟδλϧೖྗ৴߸ʹ૬౰͢ΔిѹʹͳΓ·͢ɻ
(9) ϨγʔόͷύϫʔηʔϒϞʔυͷղআ: LOPS bit = “1” → “0”
(10) ϨγʔόͷύϫʔηʔϒϞʔυ΁Ҡߦ : LOPS bit = “0” → “1”
(11) DAC Æ RCV-AmpͷύεͷDisable: DACL bit = “1” Æ “0”
(12) DAC, MIN-AmpͼٴϨγʔόͷύϫʔμ΢ϯ: PMDAC = PMMIN = PMLO bits = “1” → “0”
MS0478-J-02
- 93 -
2010/11