AK4343VN Datasheet, PDF (54/99 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

[AK4343]
ʻεςϨΦϥΠϯग़ྗͷϛΩγϯάճ࿏ʼ
AIN3 bit = “0”ͷͱ͖ɺ֤ύεͷON/OFF͸ͦΕͧΕDACL, MINL, LINL2, RINR2 bitsͰઃఆ͠·͢ɻ
MINͷՃࢉήΠϯ͸֎෦ೖྗ఍߅20kΩͷͱ͖0dB(typ)@LOVL bit = “0”Ͱ͢ɻ
LIN2/RIN2/DACͷՃࢉήΠϯ͸0dB(typ)@LOVL bit = “0”Ͱ͢ɻ
LINL2 bit
LIN2 pin
0dB
MIN pin
MINL bit
M
0dB
I
LOUT pin
DAC Lch
DACL bit X
0dB
Figure 44. LOUTͷϛΩγϯάճ࿏(AIN3 bit = “0”, LOVL bit = “0”)
RIN2 pin
MIN pin
DAC Rch
RINR2 bit
0dB
MINL bit
M
0dB
I
DACL bit X
0dB
ROUT pin
Figure 45. ROUTͷϛΩγϯάճ࿏(AIN3 bit = “0”, LOVL bit = “0”)
AIN3 bit = “1”ͷͱ͖ɺ֤ύεͷON/OFF͸ͦΕͧΕDACL, LINL2, RINR2, LINL3, RINR3, MICL3, MICR3 bits
Ͱઃఆ͠·͢ɻՃࢉήΠϯ͸͍ͣΕͷύε΋0dB(typ)Ͱ͢ɻ
LIN2 pin
LINL2 bit
0dB
LIN3 pin
LIN1 pin
MICL3 bit
LINL3 bit
0dB
M
I
*These blocks are not
Gain-Amp Lch
available at PLL mode.
X
DACL bit
DAC Lch
0dB
LOUT pin
Figure 46. LOUTͷϛΩγϯάճ࿏(AIN3 bit = “1”, LOVL bit = “0”)
RIN2 pin
RIN3 pin
RIN1 pin
RINR2 bit
0dB
MICR3 bit
RINR3 bit
0dB
M
I
*These blocks are not
Gain-Amp Rch available at PLL mode.
X
DACL bit
DAC Rch
0dB
ROUT pin
Figure 47. ROUTͷՃࢉճ࿏(AIN3 bit = “1”, LOVL bit = “0”)
MS0478-J-02
- 54 -
2010/11