AK4343VN Datasheet, PDF (59/99 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

[AK4343]
ʻϔουϑΥϯग़ྗͷϛΩγϯάճ࿏ʼ
AIN3 bit = “0”ͷͱ͖ɺ֤ύεͷON/OFF͸ͦΕͧΕDACH, MINH, LINH2, RINH2 bitsͰઃఆ͠·͢ɻ
MINͷՃࢉήΠϯ͸֎෦ೖྗ఍߅20kΩͷͱ͖−20dB(typ)@HPG bit = “0”Ͱ͢ɻ
LIN2/RIN2/DACͷՃࢉήΠϯ͸0dB(typ)@HPG bit = “0”Ͱ͢ɻ
LINH2 bit
LIN2 pin
0dB
MIN pin
MINH bit ^M
−20dB
I
HPL pin
DAC Lch
DACH bit X
0dB
Figure 54. HPLͷϛΩγϯάճ࿏(AIN3 bit = “0”, HPG bit = “0”)
RIN2 pin
MIN pin
DAC Rch
RINH2 bit
0dB
MINH bit ^M
−20dB
I
DACH bit X
0dB
HPR pin
Figure 55. HPRͷϛΩγϯάճ࿏(AIN3 bit = “0”, HPG bit = “0”)
AIN3 bit = “1”ͷͱ͖ɺ֤ύεͷON/OFF͸ͦΕͧΕDACH, LINH2, RINH2, LINH3, RINH3, MICL3, MICR3 bits
Ͱઃఆ͠·͢ɻՃࢉήΠϯ͸͍ͣΕͷύε΋0dB(typ)Ͱ͢ɻ
LIN2 pin
LINH2 bit
0dB
LIN3 pin
LIN1 pin
MICL3 bit
LINH3 bit
0dB
M
Gain-Amp Lch
DAC Lch
I
*These blocks are not
available at PLL mode.
X
DACH bit
0dB
HPL pin
Figure 56. HPLͷϛΩγϯάճ࿏(AIN3 bit = “1”, HPG bit = “0”)
RIN2 pin
RIN3 pin
RIN1 pin
RINH2 bit
0dB
MICR3 bit
RINH3 bit
0dB
M
Gain-Amp Rch
DAC Rch
*These blocks are not
I
available at PLL mode.
X
DACH bit
0dB
Figure 57. HPRͷՃࢉճ࿏(AIN3 bit = “1”, HPG bit = “0”)
HPR pin
MS0478-J-02
- 59 -
2010/11