AK4343VN Datasheet, PDF (14/99 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

[AK4343]
Parameter
Symbol
PLL Slave Mode (PLL Reference Clock = LRCK pin)
LRCK Input Timing
Frequency
fs
DSP Mode: Pulse Width High
tLRCKH
Except DSP Mode: Duty Cycle
Duty
BICK Input Timing
Period
tBCK
Pulse Width Low
Pulse Width High
tBCKL
tBCKH
PLL Slave Mode (PLL Reference Clock = BICK pin)
LRCK Input Timing
Frequency
fs
DSP Mode: Pulse Width High
tLRCKH
Except DSP Mode: Duty Cycle
Duty
BICK Input Timing
Period
PLL3-0 bits = “0010”
PLL3-0 bits = “0011”
tBCK
tBCK
Pulse Width Low
tBCKL
Pulse Width High
tBCKH
External Slave Mode
MCKI Input Timing
Frequency 256fs
fCLK
512fs
1024fs
fCLK
fCLK
Pulse Width Low
Pulse Width High
tCLKL
tCLKH
LRCK Input Timing
Frequency 256fs
fs
512fs
fs
1024fs
fs
DSP Mode: Pulse Width High
tLRCKH
Except DSP Mode: Duty Cycle
Duty
BICK Input Timing
Period
tBCK
Pulse Width Low
tBCKL
Pulse Width High
tBCKH
External Master Mode
MCKI Input Timing
Frequency 256fs
512fs
fCLK
fCLK
1024fs
fCLK
Pulse Width Low
tCLKL
Pulse Width High
tCLKH
LRCK Output Timing
Frequency
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
fs
tLRCKH
Duty
BICK Output Timing
Period
BCKO bit = “0”
tBCK
BCKO bit = “1”
tBCK
Duty Cycle
dBCK
min
7.35
tBCK−60
45
1/(64fs)
130
130
7.35
tBCK−60
45
-
-
0.4 x tBCK
0.4 x tBCK
1.8816
3.7632
7.5264
0.4/fCLK
0.4/fCLK
7.35
7.35
7.35
tBCK−60
45
312.5
130
130
1.8816
3.7632
7.5264
0.4/fCLK
0.4/fCLK
7.35
-
-
-
-
-
typ
max
Units
-
48
kHz
-
1/fs − tBCK ns
-
55
%
-
1/(32fs)
ns
-
-
ns
-
-
ns
-
-
-
1/(32fs)
1/(64fs)
-
-
48
kHz
1/fs − tBCK ns
55
%
-
ns
-
ns
-
ns
-
ns
-
12.288 MHz
-
13.312 MHz
-
13.312 MHz
-
-
ns
-
-
ns
-
48
kHz
-
26
kHz
-
13
kHz
-
1/fs − tBCK ns
-
55
%
-
-
ns
-
-
ns
-
-
ns
-
-
-
-
-
-
tBCK
50
1/(32fs)
1/(64fs)
50
12.288
13.312
13.312
-
-
48
-
-
-
-
-
MHz
MHz
MHz
ns
ns
kHz
ns
%
ns
ns
%
MS0478-J-02
- 14 -
2010/11