AK4343VN Datasheet, PDF (86/99 Pages) Asahi Kasei Microsystems – Stereo DAC with HP/RCV/SPK-AMP

[AK4343]
3. PLLεϨʔϒϞʔυͰ֎෦ΫϩοΫ(MCKI pin)Λ࢖༻͢Δ৔߹
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
MCKO bit
(Addr:01H, D1)
PMPLL bit
(Addr:01H, D0)
MCKI pin
MCKO pin
BICK pin
LRCK pin
Example:
Audio I/F Format: MSB justified
Input Master Clock Select at PLL Mode: 11.2896MHz
MCKO: Enable
Sampling Frequency: 44.1kHz
(1)
(2) (3)
(4)
(5)
Input
40msec(max)
(6)
(7)
(8)
Output
Input
(1) Power Supply & PDN pin = “L” Æ “H”
(2)Addr:04H, Data:4AH
Addr:05H, Data:27H
(3)Addr:00H, Data:40H
(4)Addr:01H, Data:03H
MCKO output start
BICK and LRCK input start
Figure 76. Clock Set Up Sequence (3)
<खॱྫ>
(1) ޙ্ཱ͛ͪݯిɺPDN pin “L” Æ “H”
͜ͷ۠ؒ͸AK4343ͷϦηοτͷͨΊɺ150nsҎ্ͷ “L”͕۠ؒඞཁͰ͢ɻ
(2) ͜ͷ۠ؒʹɺDIF1-0, PLL3-0, FS3-0 bitsͷઃఆΛߦͬͯԼ͍͞ɻ
(3) VCOMͷύϫʔΞοϓɿ PMVCM bit = “0” Æ “1”
֤ϒϩοΫΛ্ཱͪ͛Δલʹ࠷ॳʹVCOMΛ্ཱͪ͛ͯԼ͍͞ɻ
(4) MCKO ग़ྗͷઃఆ: MCKO bit = “1”
(5) PMPLL bit͕ “0” Æ “1”ʹͳΓɺMCKI pinʹΫϩοΫ͕͞څڙΕͨޙɺPLLಈ࡞͕ελʔτ͠·͢ɻ
PLLͷϩοΫ࣌ؒ͸40ms(max)Ͱ͢ɻ
(6) PLL͕҆ఆޙɺMCKO pin ͔Βਖ਼ৗͳΫϩοΫ͕ग़ྗ͞Ε·͢ɻ
(7) ͜ͷ۠ؒͰ͸ɺMCKO pin ͔Βਖ਼ৗͰͳ͍ΫϩοΫ͕ग़ྗ͞Ε·͢ɻ
(8) MCKOΫϩοΫʹಉͨ͠ظBICK, LRCKΫϩοΫΛೖྗ͍ͯͩ͘͠͞ɻ
MS0478-J-02
- 86 -
2010/11