AK4452VN Datasheet, PDF (87/91 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 2ch Premium DAC

[AK4452]
3. Analog Outputs
The analog outputs are full differential outputs and 2.8Vpp (typ, VREFH1  VREFL1 = 5V) centered around
VREFH2. The differential outputs are summed externally, V_AOUT = (AOUT+)  (AOUT) between AOUT+
and AOUT. If the summing gain is 1, the output range is 5.6Vpp (typ, VREFH1  VREFL1= 5V). The bias
voltage of the external summing circuit is supplied externally. PCM input data format is 2's complement. The
output voltage (V_AOUT) is a positive full scale for 7FFFFFH (@24bit) and a negative full scale for 800000H
(@24bit). The ideal V_AOUT is 0V for 000000H(@24bit).
The output level is determined by the 1-bit signal duty ratio in DSD input mode. The output level is positive full
scale when the duty is 100% (all “1”) and the output level is negative full scale when the duty is 0% (all “0”). In
ideal case, a 0V voltage is output when the input signal duty is 50%.
The internal switched - capacitor filters attenuate the noise generated by the delta -sigma modulator beyond the
audio pass band. Figure 79 shows an example of differential outputs and LPF circuit example by a single
op-amp.
PSRR will be “CMRR +6dB” of the external circuit when applying a 1kHz 100m Vpp sine wave to the
VREFH1 pins. If the CMRR of the external circuit is 50dB, PSRR will be 56dB.
AK4452
AOUT-
AOUT+
R1 _3.9k
R1
3.9n
3.9k
4.7k
R2 _4.7k
150
470p
+Vop
150
470p ^-Vop
Analog
Out
Figure 79 External LPF Circuit Example 1 for PCM (fc = 99.0kHz, Q=0.680)
R1
3.3k
3.9k
3.9k
4.3k
4.7k
R2
3.3k
4.7k
5.6k
6.8k
8.2k
GAIN(dB)
0 1.620665 3.142468 3.980809 4.83432
DC Load (MAX)
3.8k
4.0k
3.5k
3.6k
3.6k
Table 30. External LPF Circuit Example 1 for PCM
5.6k
12.0k
6.619864
3.8k
Frequency Response
Gain
20kHz
0.036dB
40kHz
0.225dB
80kHz
1.855dB
Table 31. Frequency Response of External LPF Circuit Example 1 for PCM
Rev. 0.1
- - 87 - -
2014/04