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AK4452VN Datasheet, PDF (66/91 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 2ch Premium DAC | |||
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[AK4452]
(2) Reset Function (RSTN bit)
The DAC can be reset by setting RSTN bit to â0â but the internal registers are not initialized. In this time, the
corresponding analog outputs go to VREFH and the DZF pin outputs âHâ if clocks (MCLK, BICK and LRCK)
are input. Figure 64 shows an example of reset sequence by RSTN bit.
RSTN bit
Internal
RSTN bit
3~4/fs (6)
2~3/fs (5)
Internal
State
Normal Operation
Digital Block Power-down
Normal Operation
D/A In
(Digital)
D/A Out
(Analog)
â0â data
(1)
GD
(3) (2)
(3)
GD (1)
Clock In
BICK
Donât care
DZF
2/fs(4)
Notes:
(1) The analog output corresponding to digital input has group delay (GD).
(2) Analog outputs are floating (Hi-Z) in power down mode.
(3) Small pop noise occurs at the edges(âï ï¯â) of the internal timing of RSTN bit. This noise is output
even if â0â data is input.
(4) The DZF pin goes to âHâ on the falling edge of RSTN bit and goes to âLâ in 2/fs after a rising edge of
the internal RSTN.
(5) There is a delay, 3~4/fs from RSTN bit â0â to the internal RSTN bit â0â, and 2~3/fs from RSTN bit â1â
to the internal RSTN bit â1â.
Figure 64. Reset Sequence Example 3
Rev. 0.1
- - 66 - -
2014/04
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