AK4452VN Datasheet, PDF (57/91 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 2ch Premium DAC

[AK4452]
■ Zero Detection (PCM mode, DSD mode)
The AK4452 has channel-independent zero detection function. Zero detection channels (AOUTL1N/P and
AOUTR1N/P pins) can be selected by 07H/08H registers (L1 bit, R1 bit). When the input data at each channel
is continuously zeros for 8192 LRCK cycles, the DZF pin goes to “H”. The DZF pin immediately returns to
“L” if the input data of each channel is not zero. If the RSTN bit is “0”, the DZF pins of both channels go to
“H”. The DZF pin of both channels go to “L” after 4 ~ 5/fs when RSTN bit returns to “1”. The DZFB bit can
invert the polarity of the DZF pin. If all channels are disabled, the DZF pin outputs “Not zero”.
DZFB bit
Data
DZF pin
0
Not zero
Zero detect
L
H
1
Not zero
Zero detect
H
L
Not zero: One of the zero detection channels set by L1 bit and R1 bit does not detect zero.
Zero detect: All zero detection channels set by L1 bit and R1 bit detect zero.
Table 21. DZF Pin Function
■ Mono Output (PCM mode, DSD mode)
Input and output signal combination of the AK4452 can be set by MONO1 bit and SELLR1 bit. The output
signal phase of DAC is controlled by INVL and INVR bits. These settings are available for any audio format.
(L1 channel indicate the output signal of the AOUTL1N and AOUTL1P pins. R1 channel indicate the output
signal of AOUTR1N and AOUTR1P pins)
MONO1 bit
0
0
1
1
SELLR1 bit
0
1
0
1
INVL1 bit
INVR1 bit
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
Table 22 Output Select for DAC
L1ch Out
L1ch In
L1ch In Invert
L1ch In
L1ch In Invert
R1ch In
R1ch In Invert
R1ch In
R1ch In Invert
L1ch In
L1ch In Invert
L1ch In
L1ch In Invert
R1ch In
R1ch In Invert
R1ch In
R1ch In Invert
R1ch Out
R1ch In
R1ch In
R1ch In Invert
R1ch In Invert
L1ch In
L1ch In
L1ch In Invert
L1ch In Invert
L1ch In
L1ch In
L1ch In Invert
L1ch In Invert
R1ch In
R1ch In
R1ch In Invert
R1ch In Invert
Rev. 0.1
- 57 -
2014/04