AKD4955-A Datasheet, PDF (7/89 Pages) Asahi Kasei Microsystems – AK4955 Evaluation Board Rev.3

[AKD4955-A]
(3-2) Setting with External Master Mode
Registers of the AK4955 should be set to “External Master Mode”.
SW4 (M/S) should be set to “OFF (L)”.
AK4955
MCKO
MCKI
BICK
LR CK
SDTO
SDTI
256fs, 512fs or 1024fs
DSP or μP
MCLK
32fs or 64fs
BCLK
1fs
LRCK
SDTI
SDTO
Figure 10.External Master Mode
PORT3 (DSP) is used. Nothing should be connected to PORT1 (TORX) and PORT2 (TOTX).
MCLK and SDTI are input from PORT3 (DSP) and BICK, LRCK and SDTO of the AK4955 is output to the
PORT3 (DSP).
JP11
BICK-SEL
JP12
JP13
BICK-PHASE LRCK-SEL
4
8
5
5
6
2
JP1４
ＭＣＫＩＯ
JP15
SDTI-SEL
JP16
MCKI-SEL
5
4
6
28
5
Figure 11.Setting of jumper pins with External Master Mode
<KM104703>
-7-
2011/08