AKD4955-A Datasheet, PDF (15/89 Pages) Asahi Kasei Microsystems – AK4955 Evaluation Board Rev.3

[AKD4955-A]
(2) Setting of SW.
Upper-side is “ON(H)” and lower-side is “OFF(L)”.
[SW1] (SW DIP-4): Mode setting for AK4118A.
No.
Name
ON (“H”)
OFF (“L”)
1
DIF2
2
DIF1
3
DIF0
4
OCKS1
See Table 4
See Table 5
Table 3.Mode setting for AK4118A
Default
ON
OFF
OFF
OFF
Mode
0
1
2
3
4
5
6
7
DIF2
L
L
L
L
H
H
H
H
DIF1
L
L
H
H
L
L
H
H
DIF0
L
H
L
H
L
H
L
H
DAUX
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, I²S
24bit, Left justified
24bit, I²S
SDTO
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I²S
24bit, Left justified
24bit, I²S
LRCK
I/O
H/L O
H/L O
H/L O
H/L O
H/L O
L/H O
H/L I
L/H I
BICK
I/O
64fs O
64fs O
64fs O
64fs O
64fs O
64fs O
64
-128fs
I
64
-128fs
I
Default
Table 4.Audio I/F Format Setting for AK4118A
OCKS1
L
H
MCKO1
256fs
512fs
Default
Table 5.Master Clock setting for AK4118A
[SW4] (SW DIP-3): Mode setting for AK4955.
No.
Name
1
I2C
2
CAD0
3
M/S
ON (“H”)
OFF (“L”)
I²C Bus
3-Wire Serial
CAD0 pin = “1”
When the AK4955 is in
“Slave Mode”.
CAD0 pin = “0”
When the AK4955 is in
“Master Mode”.
Table 6.Mode setting for AK4955
Default
OFF
OFF
ON
<KM104703>
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2011/08