AK5365 Datasheet, PDF (7/41 Pages) Asahi Kasei Microsystems – 24-BIT 96KHZ ADC WITH SELETOR/PGA/ALCl

ASAHI KASEI
[AK5365]
ANALOG CHARACTERISTICS
(Ta=25°C; AVDD=5.0V, DVDD=3.3V; AVSS=DVSS=0V; fs=48kHz, 96kHz; BICK=64fs; Signal Frequency=1kHz;
24bit Data; Measurement frequency=20Hz ∼ 20kHz at fs=48kHz, 40Hz ∼ 40kHz at fs=96kHz; unless otherwise specified)
Parameter
min
typ
max
Units
Pre-Amp Characteristics:
Feedback Resistance
10
50
kΩ
S/(N+D)
(Note 4)
-
100
dB
S/N (A-weighted)
-
108
dB
Load Resistance
(Note 5)
6.3
kΩ
Load Capacitance
20
pF
Input PGA Characteristics:
Input Voltage
(Note 6)
0.9
1
Input Resistance
(Note 7)
6.3
10
Step Size
0.2
0.5
Gain Control Range
ALC = OFF
0
ALC = ON
−9.5
ADC Analog Input Characteristics: IPGA=0dB, ALC = OFF (Note 8)
1.1
Vrms
15
kΩ
0.8
dB
+12
dB
+12
dB
Resolution
S/(N+D)
(−0.5dBFS)
fs=48kHz
84
fs=96kHz
82
DR
(−60dBFS)
fs=48kHz, A-weighted
96
fs=96kHz
89
S/N
fs=48kHz, A-weighted
96
fs=96kHz
89
Interchannel Isolation
(Note 9)
90
Interchannel Gain Mismatch
Gain Drift
Power Supply Rejection
(Note 10)
24
Bits
94
dB
92
dB
103
dB
99
dB
103
dB
99
dB
110
dB
0.2
0.5
dB
100
-
ppm/°C
50
-
dB
Power Supplies
Power Supply Current
Normal Operation (PDN pin = “H”)
AVDD
23
35
mA
DVDD
(fs=48kHz)
4
8
mA
(fs=96kHz)
8
16
mA
Power-down mode (PDN pin = “L”)
AVDD
DVDD
(Note 11)
10
100
µA
10
100
µA
Note 4. This value is measured at LOUT and ROUT pins using the circuit as shown in Figure 24.
The input signal voltage is 2Vrms.
Note 5. This value is the input impedance of an external device that the LOUT and ROUT pins can drive, when a device is
connected with LOUT and ROUT pin externally. The feedback resistor (min. 10kΩ) that it is usually connected
with the LOUT/ROUT pins, and the value of input impedance (min. 6.3kΩ) of the IPGAL/R pins are not included.
Note 6. Full scale (0dB) of the input voltage at ALC=OFF and IPGA=0dB.
Input voltage to IPGAL and IPGAR pins is proportional to AVDD voltage. Vin = 0.2 x AVDD (Vrms).
Note 7. This value is input impedance of the IPGAL and IPGAR pins.
Note 8. This value is measured via the following path. Pre-Amp → IPGA (Gain : 0dB) → ADC.
The measurement circuit is Figure 24.
Note 9. This value is the interchannel isolation between all the channels of the LIN1-5 and RIN1-5 when the applied input
signal causes the Pre-Amp output to equal IPGA input.
Note 10. PSR is applied to AVDD and DVDD with 1kHz, 50mVpp.
Note 11. All digital input pins are held DVDD or DVSS.
MS0164-E-01
-7-
2002/08