AK5365 Datasheet, PDF (26/41 Pages) Asahi Kasei Microsystems – 24-BIT 96KHZ ADC WITH SELETOR/PGA/ALCl

ASAHI KASEI
[AK5365]
[5] IPGA value before and after ALC operation
[Operation Example 1]
1. Set IPGA = +12dB at ALC=OFF. DATT portion is set to 0dB internally.
2. ALC=ON after soft mute is enabled.
3. Disable the soft mute.
4. During ALC operation. The IPGA changes from −9.5dB to the value set by REF7-0 bits.
5. ALC=OFF after soft mute is enabled.
6. Disable the soft mute. The IPGA return to +12dB automatically.
[Operation Example 2]
1. Set IPGA = +12dB at ALC=OFF. DATT portion is set to 0dB internally.
2. ALC=ON after soft mute is enabled.
3. Disable the soft mute.
4. During ALC operation. When the DATT portion is set to −10dB, the IPGA changes from −19.5dB to the value set
by REF7-0 bits.
5. ALC=OFF after soft mute is enabled.
6. Disable the soft mute. The IPGA setting is −10dB.
„ Soft Mute Operation
Soft mute operation is performed in the digital domain of the ADC output.
Soft mute can be controlled by SMUTE bit or SMUTE pin. The SMUTE bit and SMUTE pin are ORed between pin and
register. When SMUTE bit goes “1” or SMUTE pin goes “H”, the ADC output data is attenuated by −∞ within 1024 LRCK
cycles. When the SMUTE bit returned “0” or SMUTE pin goes “L” the mute is cancelled and the output attenuation
gradually changes to IPGA value within 1024 LRCK cycles. If the soft mute is cancelled before mute state after starting of
the operation, the attenuation is discontinued and returned to IPGA value.
Soft mute function and digital volume are common.
SMUTE
Attenuation
DATT Level
-∞
SDTO
(1)
GD
(2)
(3)
GD
Figure 13. Soft Mute Function
(1) The output signal is attenuated by −∞ within 1024 LRCK cycles (1024/fs).
(2) Digital output delay from the analog input is called the group delay (GD).
(3) If the soft mute is cancelled before the mute, the attenuation is discontinued and returned to IPGA value.
MS0164-E-01
- 26 -
2002/08