AK5365 Datasheet, PDF (5/41 Pages) Asahi Kasei Microsystems – 24-BIT 96KHZ ADC WITH SELETOR/PGA/ALCl

ASAHI KASEI
[AK5365]
No. Pin Name
23 LRCK
24 MCLK
25 PDN
26 ALC
27 SMUTE
28 SEL0
29 SEL1
30 SEL2
31
CDTI
SDA
32 ^CCLK
SCL
33
CSN
CAD1
34 CTRL
35 M/S
36 RIN1
37 TEST5
38 RIN2
39 TEST6
40 RIN3
41 TEST7
42 RIN4
43 TEST8
44 RIN5
I/O
Function
I/O Output Channel Clock Pin
I Master Clock Input Pin
I
Power-Down Mode Pin
“H”: Power up, “L”: Power down reset and initializes the control register.
I
ALC Enable Pin
(Internal Pull-down Pin, typ. 100kΩ)
“H” : ALC Enable, “L” : ALC Disable
I
Soft Mute Pin
(Internal Pull-down Pin, typ. 100kΩ)
“H” : Soft Mute, “L” : Normal Operation
I Input Selector 0 Pin
I Input Selector 1 Pin
I Input Selector 2 Pin
I Control Data Input Pin in 3-wire Control
(CTRL pin = “L”)
I/O Control Data Input / Output Pin in I²C Control (CTRL pin = “H”)
I Control Data Clock Pin in 3-wire Control
I Control Data Clock Pin in I²C Control
(CTRL pin = “L”)
(CTRL pin = “H”)
I Chip Select Pin in 3-wire Control
I Chip Address 1 Select Pin in I²C Control
(CTRL pin = “L”)
(CTRL pin = “H”)
I
Control Mode Pin
“H” : I²C Control & I²S Compatible, “L” : 3-wire Control
I
Master / Slave Mode Pin
“H” : Master Mode, “L” : Slave Mode
I Rch Analog Input 1 Pin
I Test 5 Pin (Connected to AVSS)
I Rch Analog Input 2 Pin
I Test 6 Pin (Connected to AVSS)
I Rch Analog Input 3 Pin
I Test 7 Pin (Connected to AVSS)
I Rch Analog Input 4 Pin
I Test 8 Pin (Connected to AVSS)
I Rch Analog Input 5 Pin
Note: All digital input pins except pull-down pins should not be left floating.
Note: TEST5, TEST6, TEST7 and TEST8 pins should be connected to AVSS.
MS0164-E-01
-5-
2002/08