AK5365 Datasheet, PDF (17/41 Pages) Asahi Kasei Microsystems – 24-BIT 96KHZ ADC WITH SELETOR/PGA/ALCl

ASAHI KASEI
[AK5365]
(2) Power-up Sequence 2
Power Supply
PDN pin
ADC Internal State
IPGA
SDTO
External clocks
in slave mode
External clocks
in master mode
BICK, LRCK
in master mode
(1)
Unsettling PDN INITA
Normal
Unsettling 00H 00H → 7FH
7FH
Unsettling
“0”
FI
Output
MCLK, BICK, LRCK
MCLK, LRCK, BICK
The clocks can be input.
MCLK
MCLK
The clocks can be input.
Unsettling Fixed to “L”
BICK, LRCK
- INITA : Initializing period of ADC analog section (516/fs).
- FI : Fade in. After exiting power down, IPGA value fades in.
- PDN : Power down state.
- The period of (1) should be min. 150ns in Figure 4.
Figure 4. Power-up Sequence 2
MS0164-E-01
- 17 -
2002/08