AK8851 Datasheet, PDF (63/80 Pages) Asahi Kasei Microsystems – NTSC/PAL/SECAM Digital Video Decoder

ASAHI KASEI
PGA1 Control Register (R/W) [Sub Address 0x0A]
Set PGA1
Sub Address 0x0A
bit 7
bit 6
Reserved
PGA1_6
0
1
bit 5
PGA1_5
0
bit 4
bit 3
PGA1_4
PGA1_3
Default Value
0
0
bit 2
PGA1_2
1
[AK8851]
Default Value : 0x46
bit 1
bit 0
PGA1_1
PGA1_0
1
0
PGA1 Control Register Definition
BIT Register Name
bit 0
PGA1_0
~
~
PGA1 Gain Set
bit 6
PGA1_6
bit 7 Reserved Reserved
R/W Definition
Set the gain of PGA1
R/W ^{Gain step of PGA is about 0.1dB}
R/W Reserved
PGA2 Control Register (R/W) [Sub Address 0x0B]
Set PGA2
Sub Address 0x0B
bit 7
bit 6
Reserved
PGA2_6
0
1
bit 5
PGA2_5
0
bit 4
bit 3
PGA2_4
PGA2_3
Default Value
0
0
bit 2
PGA2_2
1
Default Value : 0x46
bit 1
bit 0
PGA2_1
PGA2_0
1
0
PGA2 Control Register Definition
BIT Register Name
bit 0
PGA2_0
~
~
PGA2 Gain Set
bit 6
PGA2_6
bit 7 Reserved Reserved
R/W Definition
Set the gain of PGA2
Gain step of PGA is about 0.1dB
R/W
R/W Reserved
MS0244-E-03
63
Confidential
2005 / 07