AK4536 Datasheet, PDF (55/59 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4536]
n Speaker-amp Output
FS2-0 bits _XXX
(Addr:05H,D2-0)
(1)
DACM bit
(Addr:02H,D3)
(2)
ALC2S bit
(Addr:02H,D5)
XXX
Example:
PLL, Master Mode
Audio I/F Format :DSP Mode, BCKP=MSBS= “0”
Sampling Frequency: 8kHz
Digital Volume: -8dB
ALC2 : Enable
(1) Addr:05H, Data:00H
(2) Addr:02H, Data:28H
ALC2 bit
(Addr:07H,D6)
DOL7-0 bits
(Addr:0AH,D7-0)
PMDAC bit
(Addr:00H,D2)
PMSPK bit
(Addr:00H,D4)
0
(3)
0001100
(4)
(5)
X
XXXXXXX
(8)
(3) Addr:07H, Data:40H
(4) Addr:0AH, Data:28H
(5) Addr:00H, Data:54H
(6) Addr:02H, Data:A8H
SPPS bit
(Addr:02H,D7)
SPP pin
Hi-Z
(6)
(7)
Normal Output
Hi-Z
Playback
(7) Addr:02H, Data:28H
SPN pin
Hi-Z
SVDD/2 Normal Output SVDD/2 Hi-Z
(8) Addr:00H, Data:40H
Figure 39. Speaker-Amp Output Sequence
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS2-0 bit). When the AK4536 is PLL mode, DAC and Speaker-Amp should be
powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up the path of “DAC à SPK-Amp”
DACM = ALC2S bit: “0” à “1”
(3) Set up the ALC2 Enable/Disable (ALC2 bit)
(4) Set up the digital volume (Addr = 0AH)
(5) Power Up of DAC and Speaker-Amp: PMDAC bit = PMSPK bit = “0” → “1”
(6) Exit the power-save-mode of Speaker-Amp: SPPS bit = “0” → “1”
The initializing time of Speaker amp is 512/fs =64ms ( @ fs=8kHz, ROTM bit = “0”)
(7) Enter the power-save-mode of Speaker-Amp: SPPS bit = “1” → “0”
(8) Power Down DAC and Speaker-Amp: PMDAC bit = PMSPK bit = “1” → “0”
MS0174-E-00
- 55 -
2002/09