AK4536 Datasheet, PDF (44/59 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4536]
Addr
07H
Register Name
ALC Mode Control 1
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
ALC2 ALC1 ZELM LMAT1 LMAT0 RATT LMTH
0
1
0
0
0
0
0
0
LMTH: ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level (see Table 28 )
The ALC1 limiter detection level and the ALC1 recovery counter reset level may be offset by about ±2dB.
Default is “0”.
LMTH bit
0
1
ALC1 Limiter Detection Level ALC1 Recovery Waiting Counter Reset Level
ADC Input ≥ −6.0dBFS
−6.0dBFS > ADC Input ≥ −8.0dBFS
ADC Input ≥ −4.0dBFS
−4.0dBFS > ADC Input ≥ −6.0dBFS
Table 28. ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
Default
RATT: ALC1 Recovery GAIN Step (see Table 29)
During the ALC1 recovery operation, the number of steps changed from the current IPGA value is set. For
example, when the current IPGA value is 30H and RATT bit = “1” is set, the IPGA changes to 32H by the
ALC1 recovery operation and the output signal level is gained up by 1dB (=0.5dB x 2). When the IPGA value
exceeds the reference level (REF6-0 bits), the IPGA value does not increase.
RATT bit GAIN STEP
0
1
Default
1
2
Table 29. ALC1 Recovery Gain Step Setting
LMAT1-0: ALC1 Limiter ATT Step (see Table 30)
During the ALC1 limiter operation, when IPGA output signal exceeds the ALC1 limiter detection level set by
LMTH, the number of steps attenuated from the current IPGA value is set. For example, when the current IPGA
value is 47H and the LMAT1-0 bits = “11”, the IPGA transition to 43H when the ALC1 limiter operation starts,
resulting in the input signal level being attenuated by 2dB (=0.5dB x 4). When the attenuation value exceeds
IPGA = “00” (−8dB), it clips to “00”.
LMAT1 bit LMAT0 bit ATT STEP
0
0
1
0
1
2
1
0
3
1
1
4
Table 30. ALC1 Limiter ATT Step Setting
Default
ZELM:
Enable zero crossing detection at ALC1 Limiter operation
0: Enable (Default)
1: Disable
When the ZELM bit = “0”, the IPGA of each L/R channel perform a zero crossing or timeout independently and
the IPGA value is changed by the ALC1 operation. The zero crossing timeout is the same as the ALC1 recovery
operation. When the ZELM bit = “1”, the IPGA value is changed immediately.
MS0174-E-00
- 44 -
2002/09