AK4536 Datasheet, PDF (42/59 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4536]
Addr
05H
Register Name
Mode Control 2
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
MSBS BCKP FS2
FS1
FS0
0
0
0
0
0
0
0
0
FS2-0: Setting of Sampling Frequency (See Table 21 and Table 22) and MCKI Frequency (See Table 23)
These bits are selected to sampling frequency at PLL mode and MCKI frequency at EXT mode.
Mode
FS2 bit
FS1 bit
FS0 bit Sampling Frequency
0
0
0
0
1
0
0
1
8kHz
12kHz
2
0
1
0
3
0
1
1
16kHz
24kHz
4
1
0
0
N/A
5
1
0
1
11.025kHz
6
1
1
0
N/A
7
1
1
1
22.05kHz
Table 21. Setting of Sampling Frequency at PLL2 bit = “1” and PMPLL = “1”
Default
Mode FS1 bit FS0 bit Sampling Frequency Range
0
0
0
7.35kHz ≤ fs ≤ 10kHz Default
1
0
1
10kHz < fs ≤ 14kHz
2
1
0
14kHz < fs ≤ 20kHz
3
1
1
20kHz < fs ≤ 26kHz
Table 22. Setting of Sampling Frequency at PLL2 bit = “0” and PMPLL = “1”
* FS2 bit is ignored.
Mode FS1 bit FS0 bit MCKI Input Frequency Sampling Frequency Range
0
0
0
256fs
7.35kHz ∼ 26kHz
1
0
1
1024fs
7.35kHz ∼ 13kHz
2
1
0
256fs
7.35kHz ∼ 26kHz
3
1
1
512fs
7.35kHz ∼ 26kHz
Table 23. MCKI Frequency at EXT, Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
* FS2 bit is ignored.
Default
BCKP, MSBS: “00” (Default) (See Table 26)
MSBS bit BCKP bit Data Input/Output Timing
0
0
Figure 21
Default
0
1
Figure 23
1
0
Figure 22
1
1
Figure 24
Table 24. Relation between MSBS, BCKP bits and data I/O timing
MS0174-E-00
- 42 -
2002/09