AKD4122A-A Datasheet, PDF (5/37 Pages) Asahi Kasei Microsystems – Evaluation board Rev.0 for AK4122A

[AKD4122A-A]
(1) Setting for Input port (AK4122A PORT1)
(1-1) Slave Mode
1. When using DIR function of AK4114 (U12)
When using PORT4 (DIR1), nothing should be connected to J4 (EXT1) and PORT5 (DSP1). JP12 (EXT1)
should be short.
JP11
BICK1
JP12
EXT1
JP13
SDTO
JP14
LRCK1
DIR EXT
• SW2 setting (See Table 1,Table 2)
Upper-side is “H” and lower-side is “L”.
SW2 No.
1
2
3
4
Name
OCKS
DIF0
DIF1
DIF2
ON (“H”)
OFF (“L”)
Fixed to “L”
AK4114 Audio Format Setting
Refer to Table 2
Table 1. SW2 setting
Mode
0
1
2
3
Audio I/F Format
16bit, LSB justified
24bit, MSB justified
24bit, I²S Compatible
24bit, LSB justified
DIF2
0
1
1
0
AK4114
DIF1
0
0
0
1
DIF0
0
0
1
1
AK4122A
DIF1 DIF0
0
0
0
1
1
0
1
1
Table 2. AK4114 Audio interface format setting
Default
* DIF1-0 of the AK4122A is set by the register.
2. When connecting with the serial interface of UPD, ROHDE & SCHWARZ
When using PORT5 (DSP1), nothing should be connected to PORT4 (DIR1). BICK is input from J4 (EXT1),
and the LRCK and SDTI are supplied from UPD. JP12 (EXT1) should be open.
JP11
BICK1
JP12
EXT1
JP13
SDTO
JP14
LRCK1
DIR EXT
3. All clocks are fed through the 10pin port
When using PORT5 (DSP1), nothing should be connected to J4 (EXT1) and PORT4 (DIR1). JP12 (EXT1)
should be short.
JP11
JP12
JP13
JP14
BICK1
EXT1 SDTO LRCK1
DIR EXT
<KM099400>
-5-
2009/03