AKD4122A-A Datasheet, PDF (3/37 Pages) Asahi Kasei Microsystems – Evaluation board Rev.0 for AK4122A

[AKD4122A-A]
(1) AK4122A PORT1 → SRC → AK4122A PORT3
Refer to page 5 for input port setting, and page 15 ∼ 18 for output port setting.
P O RT4
DIR 1
U12
AK 4 1 14
PORT 5
DS P1
AK4122A
BI CK1
LRCK1
SDT I
BI CK
LRCK
S DTO
OMCLK
U14
A K4 1 14
PORT 9
DS P3
PORT 10
D IT3
J4
EXT1
Divider
J3
E X T3
Figure 3. AK4122A PORT1 → SRC → AK4122A PORT3
(2) AK4122A PORT2 → SRC → AK4122A PORT3
Refer to page 6 ∼ 9 for input port setting, and page 15 ∼ 18 for output port setting.
P O RT6
DIR 2
U13
AK 4 1 14
PORT 7
DS P2
J2
EXT2
Divider
AK4122A
BI CK2
BI CK
LRCK2
LRCK
SDT IO
S DTO
MCLK2 OMCLK
U14
A K4 1 14
PORT 10
D IT3
PORT 9
DS P3
Divider
J3
E X T3
Figure 4. AK4122A PORT2 → SRC → AK4122A PORT3
(3) AK4122A DIR → SRC → AK4122A PORT3
Refer to page 10 for input port setting, and page 15 ∼ 18 for output port setting.
P O RT3
DI R
J1
RX
AK4122A
RX1
BIC K
RX2
LRC K
RX3
SDT O
RX4
O MCL K
U14
AK 4 1 14
PO RT1 0
DI T3
PO RT9
DS P3
Divider
J3
EXT 3
Figure 5. AK4122A DIR → SRC → AK4122A PORT3
<KM099400>
-3-
2009/03