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P0103 Datasheet, PDF (15/50 Pages) AEL Crystals Ltd – Introduction of the VEEK-MT
Figure 3-3 JTAG Chain Configuration Scheme
Figure 3-4 The RUN/PROG switch (SW19) is set to JTAG mode
 Configuring the EPCS64 in AS Mode
Figure 3-5 illustrates the AS configuration set up. To download a configuration bit stream into the
EPCS64 serial configuration device, perform the following steps:
 Ensure that power is applied to the VEEK-MT
 Connect the supplied USB cable to the USB-Blaster port on the VEEK-MT
 Configure the JTAG programming circuit by setting the RUN/PROG slide switch (SW19) to
the PROG position
 The EPCS64 chip can now be programmed by using the Quartus II Programmer module to
select a configuration bit stream file with the .pof filename extension
 Once the programming operation is finished, set the RUN/PROG slide switch back to the RUN
position and then reset the board by turning the power switch off and back on; this action
causes the new configuration data in the EPCS64 device to be loaded into the FPGA chip
VEEK-MT User Manual
12
www.terasic.com
May 20, 2014