English
Language : 

P0103 Datasheet, PDF (13/50 Pages) AEL Crystals Ltd – Introduction of the VEEK-MT
Chapter 3
Using VEEK-MT
This section describes the detailed information of the components, connectors, and pin assignments
of the VEEK-MT.
3.1 Configuring the Cyclone IV E FPGA
The Video and Embedded Evaluation Kit (VEEK-MT) contains a serial configuration device that
stores configuration data for the Cyclone IV E FPGA. This configuration data is automatically
loaded from the configuration device into the FPGA every time while power is applied to the board.
Using the Quartus II software, it is possible to reconfigure the FPGA at any time, and it is also
possible to change the non-volatile data that is stored in the serial configuration device. Both types
of programming methods are described below.
1. JTAG programming: In this method of programming, named after the IEEE standards Joint
Test Action Group, the configuration bit stream is downloaded directly into the Cyclone IV E
FPGA. The FPGA will retain this configuration as long as power is applied to the board; the
configuration information will be lost when the power is turned off.
2. AS programming: In this method, called Active Serial programming, the configuration bit
stream is downloaded into the Altera EPCS64 serial configuration device. It provides
non-volatile storage of the bit stream, so that the information is retained even when the power
supply to the VEEK-MT is turned off. When the board’s power is turned on, the configuration
data in the EPCS64 device is automatically loaded into the Cyclone IV E FPGA.
 JTAG Chain on VEEK-MT
To use the JTAG interface for configuring FPGA device, the JTAG chain on the VEEK-MT must
form a closed loop that allows Quartus II programmer to detect the FPGA device. Figure 3-1
illustrates the JTAG chain on the VEEK-MT. Shorting pin1 and pin2 on JP3 can disable the JTAG
signals on the HSMC connector that will form a close JTAG loopback on DE2-115 (See Figure
3-2). Thus, only the on-board FPGA device (Cyclone IV E) will be detected by Quartus II
programmer. By default, a jumper is placed on pin1 and pin2 of JP3. To prevent any changes to the
bus controller (Max II EPM240) described in later sections, users should not adjust the jumper on
JP3.
VEEK-MT User Manual
10
www.terasic.com
May 20, 2014