DS593 Datasheet, PDF (33/35 Pages) Xilinx, Inc – Includes innovative FPGA-based acceleration

Platform Cable USB II
Table 10: Switching Characteristics
Symbol
Description
T_TSU
Target Setup Time
(TDI or TMS relative to the
positive edge of TCK)
T_CSU
Cable Setup Time
(TDO relative to the
negative edge of TCK)
T_TPD
Target Propagation Delay Time
(TDO relative to the
negative edge of TCK)
Conditions
V_REF = 1.5V to 3.3V
V_REF = 1.5V to 3.3V
V_REF = 1.5V to 3.3V
Min
Max
Units
4.8
ns
15.8
ns
24.6
ns
X-Ref Target - Figure 31
Target devices samples TMS_PROG_SS and
TDI_DIN_MOSI on the rising edge of TCK_CCLK_SCK
Target device asserts TDO_DONE_MISO
on the falling edge of TCK_CCLK_SCK
T_CLK
T_TSU
TCK_CCLK_SCK
TMS_PROG_SS /
TDI_DIN_MOSI
Platform Cable USB II asserts
TMS_PROG_SS and
TDI_DIN_MOSI on the falling
edge of TCK_CCLK_SCK
TDO_DONE_MISO
T_CPD
T_TPD
T_CSU
Platform Cable USB II samples TDO_DONE_MISO
on the falling edge of TCK_CCLK_SCK
DS593_31_021408
Notes:
1. All times are in nanoseconds and are relative to the target system interface connector.
2. T_TSU Min is the minimum setup time guaranteed by Platform Cable USB II relative to the positive edge of TCK_CCLK_SCK.
3. T_CSU Min is the minimum setup required by Platform Cable USB II to properly sample TDO_DONE_MISO.
4. Propagation delays associated with buffers on the target system must be taken into account to satisfy the minimum setup times.
Figure 31: Platform Cable USB II Timing Diagram
USB-IF Compliance
Platform Cable USB II is certified by the USB Integrators Forum (USB-IF). Certification is achieved when a product passes
a battery of tests required by the USB-IF Compliance Program. These tests (performed at an independent test facility)
measure a product's conformity with Universal Serial Bus Specification Revision 2.0 and establish a reasonable level of
DS593 (v1.2.1) March 17, 2011
www.xilinx.com
33